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intel/compiler: Add NF some more places

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Necessary to handle these cases when we test fuzzed instructions.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2635>
This commit is contained in:
Matt Turner
2020-01-02 14:54:34 -08:00
committed by Marge Bot
parent 8634286c5d
commit ab7c25b9aa
2 changed files with 5 additions and 0 deletions
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4
src/intel/compiler/brw_eu_validate.c
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@@ -475,6 +475,10 @@ execution_type(const struct gen_device_info *devinfo, const brw_inst *inst)
if (src0_exec_type == src1_exec_type) if (src0_exec_type == src1_exec_type)
return src0_exec_type; return src0_exec_type;
if (src0_exec_type == BRW_REGISTER_TYPE_NF ||
src1_exec_type == BRW_REGISTER_TYPE_NF)
return BRW_REGISTER_TYPE_NF;
/* Mixed operand types where one is float is float on Gen < 6 /* Mixed operand types where one is float is float on Gen < 6
* (and not allowed on later platforms) * (and not allowed on later platforms)
*/ */

1
src/intel/compiler/brw_reg.h
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@@ -318,6 +318,7 @@ type_sz(unsigned type)
case BRW_REGISTER_TYPE_UQ: case BRW_REGISTER_TYPE_UQ:
case BRW_REGISTER_TYPE_Q: case BRW_REGISTER_TYPE_Q:
case BRW_REGISTER_TYPE_DF: case BRW_REGISTER_TYPE_DF:
case BRW_REGISTER_TYPE_NF:
return 8; return 8;
case BRW_REGISTER_TYPE_UD: case BRW_REGISTER_TYPE_UD:
case BRW_REGISTER_TYPE_D: case BRW_REGISTER_TYPE_D: