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intel/compiler: Pass detailed dependency classes to invalidate_analysis()

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Have fun reading through the whole back-end optimizer to verify
whether I've missed any dependency flags -- Or alternatively, just
trust that any mistake here will trigger an assertion failure during
analysis pass validation if it ever poses a problem for the
consistency of any of the analysis passes managed by the framework.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4012>
This commit is contained in:
Francisco Jerez
2016-03-13 19:26:37 -07:00
committed by Matt Turner
parent 65080dc8df
commit ab6d792986
20 changed files with 61 additions and 54 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
src/intel/compiler/brw_dead_control_flow.cpp
View File

@@ -115,7 +115,7 @@ dead_control_flow_eliminate(backend_shader *s)
}
if (progress)
s->invalidate_analysis(DEPENDENCY_EVERYTHING);
s->invalidate_analysis(DEPENDENCY_BLOCKS | DEPENDENCY_INSTRUCTIONS);
return progress;
}

51
src/intel/compiler/brw_fs.cpp
View File

@@ -2029,7 +2029,7 @@ fs_visitor::split_virtual_grfs()
}
}
}
invalidate_analysis(DEPENDENCY_EVERYTHING);
invalidate_analysis(DEPENDENCY_INSTRUCTION_DETAIL | DEPENDENCY_VARIABLES);
delete[] split_points;
delete[] new_virtual_grf;
@@ -2074,7 +2074,7 @@ fs_visitor::compact_virtual_grfs()
} else {
remap_table[i] = new_index;
alloc.sizes[new_index] = alloc.sizes[i];
invalidate_analysis(DEPENDENCY_EVERYTHING);
invalidate_analysis(DEPENDENCY_INSTRUCTION_DETAIL | DEPENDENCY_VARIABLES);
++new_index;
}
}
@@ -2537,7 +2537,7 @@ fs_visitor::lower_constant_loads()
inst->remove(block);
}
}
invalidate_analysis(DEPENDENCY_EVERYTHING);
invalidate_analysis(DEPENDENCY_INSTRUCTIONS);
}
bool
@@ -2817,7 +2817,8 @@ fs_visitor::opt_algebraic()
}
if (progress)
invalidate_analysis(DEPENDENCY_EVERYTHING);
invalidate_analysis(DEPENDENCY_INSTRUCTION_DATA_FLOW |
DEPENDENCY_INSTRUCTION_DETAIL);
return progress;
}
@@ -2868,7 +2869,7 @@ fs_visitor::opt_zero_samples()
}
if (progress)
invalidate_analysis(DEPENDENCY_EVERYTHING);
invalidate_analysis(DEPENDENCY_INSTRUCTION_DETAIL);
return progress;
}
@@ -2965,7 +2966,7 @@ fs_visitor::opt_sampler_eot()
* flag and submit a header together with the sampler message as required
* by the hardware.
*/
invalidate_analysis(DEPENDENCY_EVERYTHING);
invalidate_analysis(DEPENDENCY_INSTRUCTIONS | DEPENDENCY_VARIABLES);
return true;
}
@@ -3018,7 +3019,8 @@ fs_visitor::opt_register_renaming()
}
if (progress) {
invalidate_analysis(DEPENDENCY_EVERYTHING);
invalidate_analysis(DEPENDENCY_INSTRUCTION_DETAIL |
DEPENDENCY_VARIABLES);
for (unsigned i = 0; i < ARRAY_SIZE(delta_xy); i++) {
if (delta_xy[i].file == VGRF && remap[delta_xy[i].nr] != ~0u) {
@@ -3066,7 +3068,7 @@ fs_visitor::opt_redundant_discard_jumps()
}
if (progress)
invalidate_analysis(DEPENDENCY_EVERYTHING);
invalidate_analysis(DEPENDENCY_INSTRUCTIONS);
return progress;
}
@@ -3260,7 +3262,7 @@ fs_visitor::compute_to_mrf()
}
if (progress)
invalidate_analysis(DEPENDENCY_EVERYTHING);
invalidate_analysis(DEPENDENCY_INSTRUCTIONS);
return progress;
}
@@ -3318,7 +3320,7 @@ fs_visitor::eliminate_find_live_channel()
}
if (progress)
invalidate_analysis(DEPENDENCY_EVERYTHING);
invalidate_analysis(DEPENDENCY_INSTRUCTION_DETAIL);
return progress;
}
@@ -3466,7 +3468,7 @@ fs_visitor::remove_duplicate_mrf_writes()
}
if (progress)
invalidate_analysis(DEPENDENCY_EVERYTHING);
invalidate_analysis(DEPENDENCY_INSTRUCTIONS);
return progress;
}
@@ -3515,7 +3517,7 @@ fs_visitor::remove_extra_rounding_modes()
}
if (progress)
invalidate_analysis(DEPENDENCY_EVERYTHING);
invalidate_analysis(DEPENDENCY_INSTRUCTIONS);
return progress;
}
@@ -3696,7 +3698,7 @@ fs_visitor::insert_gen4_send_dependency_workarounds()
}
if (progress)
invalidate_analysis(DEPENDENCY_EVERYTHING);
invalidate_analysis(DEPENDENCY_INSTRUCTIONS);
}
/**
@@ -3736,7 +3738,7 @@ fs_visitor::lower_uniform_pull_constant_loads()
inst->header_size = 1;
inst->mlen = 1;
invalidate_analysis(DEPENDENCY_EVERYTHING);
invalidate_analysis(DEPENDENCY_INSTRUCTIONS | DEPENDENCY_VARIABLES);
} else {
/* Before register allocation, we didn't tell the scheduler about the
* MRF we use. We know it's safe to use this MRF because nothing
@@ -3854,7 +3856,7 @@ fs_visitor::lower_load_payload()
}
if (progress)
invalidate_analysis(DEPENDENCY_EVERYTHING);
invalidate_analysis(DEPENDENCY_INSTRUCTIONS);
return progress;
}
@@ -4154,7 +4156,7 @@ fs_visitor::lower_integer_multiplication()
}
if (progress)
invalidate_analysis(DEPENDENCY_EVERYTHING);
invalidate_analysis(DEPENDENCY_INSTRUCTIONS | DEPENDENCY_VARIABLES);
return progress;
}
@@ -4184,7 +4186,7 @@ fs_visitor::lower_minmax()
}
if (progress)
invalidate_analysis(DEPENDENCY_EVERYTHING);
invalidate_analysis(DEPENDENCY_INSTRUCTIONS);
return progress;
}
@@ -4273,7 +4275,7 @@ fs_visitor::lower_sub_sat()
}
if (progress)
invalidate_analysis(DEPENDENCY_EVERYTHING);
invalidate_analysis(DEPENDENCY_INSTRUCTIONS | DEPENDENCY_VARIABLES);
return progress;
}
@@ -5985,7 +5987,7 @@ fs_visitor::lower_logical_sends()
}
if (progress)
invalidate_analysis(DEPENDENCY_EVERYTHING);
invalidate_analysis(DEPENDENCY_INSTRUCTIONS | DEPENDENCY_VARIABLES);
return progress;
}
@@ -6870,7 +6872,7 @@ fs_visitor::lower_simd_width()
}
if (progress)
invalidate_analysis(DEPENDENCY_EVERYTHING);
invalidate_analysis(DEPENDENCY_INSTRUCTIONS | DEPENDENCY_VARIABLES);
return progress;
}
@@ -6951,7 +6953,7 @@ fs_visitor::lower_barycentrics()
}
if (progress)
invalidate_analysis(DEPENDENCY_EVERYTHING);
invalidate_analysis(DEPENDENCY_INSTRUCTIONS | DEPENDENCY_VARIABLES);
return progress;
}
@@ -7593,7 +7595,7 @@ fs_visitor::fixup_sends_duplicate_payload()
}
if (progress)
invalidate_analysis(DEPENDENCY_EVERYTHING);
invalidate_analysis(DEPENDENCY_INSTRUCTIONS | DEPENDENCY_VARIABLES);
return progress;
}
@@ -7616,7 +7618,8 @@ fs_visitor::fixup_3src_null_dest()
}
if (progress)
invalidate_analysis(DEPENDENCY_EVERYTHING);
invalidate_analysis(DEPENDENCY_INSTRUCTION_DETAIL |
DEPENDENCY_VARIABLES);
}
/**
@@ -7759,7 +7762,7 @@ fs_visitor::fixup_nomask_control_flow()
}
if (progress)
invalidate_analysis(DEPENDENCY_EVERYTHING);
invalidate_analysis(DEPENDENCY_INSTRUCTIONS | DEPENDENCY_VARIABLES);
return progress;
}

2
src/intel/compiler/brw_fs_cmod_propagation.cpp
View File

@@ -448,7 +448,7 @@ fs_visitor::opt_cmod_propagation()
}
if (progress)
invalidate_analysis(DEPENDENCY_EVERYTHING);
invalidate_analysis(DEPENDENCY_INSTRUCTIONS);
return progress;
}

2
src/intel/compiler/brw_fs_combine_constants.cpp
View File

@@ -559,7 +559,7 @@ fs_visitor::opt_combine_constants()
}
ralloc_free(const_ctx);
invalidate_analysis(DEPENDENCY_EVERYTHING);
invalidate_analysis(DEPENDENCY_INSTRUCTIONS | DEPENDENCY_VARIABLES);
return true;
}

3
src/intel/compiler/brw_fs_copy_propagation.cpp
View File

@@ -1067,7 +1067,8 @@ fs_visitor::opt_copy_propagation()
ralloc_free(copy_prop_ctx);
if (progress)
invalidate_analysis(DEPENDENCY_EVERYTHING);
invalidate_analysis(DEPENDENCY_INSTRUCTION_DATA_FLOW |
DEPENDENCY_INSTRUCTION_DETAIL);
return progress;
}

2
src/intel/compiler/brw_fs_cse.cpp
View File

@@ -389,7 +389,7 @@ fs_visitor::opt_cse()
}
if (progress)
invalidate_analysis(DEPENDENCY_EVERYTHING);
invalidate_analysis(DEPENDENCY_INSTRUCTIONS | DEPENDENCY_VARIABLES);
return progress;
}

2
src/intel/compiler/brw_fs_dead_code_eliminate.cpp
View File

@@ -144,7 +144,7 @@ fs_visitor::dead_code_eliminate()
ralloc_free(flag_live);
if (progress)
invalidate_analysis(DEPENDENCY_EVERYTHING);
invalidate_analysis(DEPENDENCY_INSTRUCTIONS);
return progress;
}

2
src/intel/compiler/brw_fs_lower_pack.cpp
View File

@@ -49,7 +49,7 @@ fs_visitor::lower_pack()
}
if (progress)
invalidate_analysis(DEPENDENCY_EVERYTHING);
invalidate_analysis(DEPENDENCY_INSTRUCTIONS);
return progress;
}

2
src/intel/compiler/brw_fs_lower_regioning.cpp
View File

@@ -454,7 +454,7 @@ fs_visitor::lower_regioning()
progress |= lower_instruction(this, block, inst);
if (progress)
invalidate_analysis(DEPENDENCY_EVERYTHING);
invalidate_analysis(DEPENDENCY_INSTRUCTIONS | DEPENDENCY_VARIABLES);
return progress;
}

2
src/intel/compiler/brw_fs_reg_allocate.cpp
View File

@@ -1208,7 +1208,7 @@ fs_reg_alloc::assign_regs(bool allow_spilling, bool spill_all)
}
if (spilled)
fs->invalidate_analysis(DEPENDENCY_EVERYTHING);
fs->invalidate_analysis(DEPENDENCY_INSTRUCTIONS | DEPENDENCY_VARIABLES);
/* Get the chosen virtual registers for each node, and map virtual
* regs in the register classes back down to real hardware reg

2
src/intel/compiler/brw_fs_register_coalesce.cpp
View File

@@ -290,7 +290,7 @@ fs_visitor::register_coalesce()
}
}
invalidate_analysis(DEPENDENCY_EVERYTHING);
invalidate_analysis(DEPENDENCY_INSTRUCTIONS);
}
return progress;

2
src/intel/compiler/brw_fs_sel_peephole.cpp
View File

@@ -215,7 +215,7 @@ fs_visitor::opt_peephole_sel()
}
if (progress)
invalidate_analysis(DEPENDENCY_EVERYTHING);
invalidate_analysis(DEPENDENCY_INSTRUCTIONS | DEPENDENCY_VARIABLES);
return progress;
}

2
src/intel/compiler/brw_predicated_break.cpp
View File

@@ -138,7 +138,7 @@ opt_predicated_break(backend_shader *s)
}
if (progress)
s->invalidate_analysis(DEPENDENCY_EVERYTHING);
s->invalidate_analysis(DEPENDENCY_BLOCKS | DEPENDENCY_INSTRUCTIONS);
return progress;
}

4
src/intel/compiler/brw_schedule_instructions.cpp
View File

@@ -1839,7 +1839,7 @@ fs_visitor::schedule_instructions(instruction_scheduler_mode mode)
cfg->num_blocks, mode);
sched.run(cfg);
invalidate_analysis(DEPENDENCY_EVERYTHING);
invalidate_analysis(DEPENDENCY_INSTRUCTIONS);
}
void
@@ -1848,5 +1848,5 @@ vec4_visitor::opt_schedule_instructions()
vec4_instruction_scheduler sched(this, prog_data->total_grf);
sched.run(cfg);
invalidate_analysis(DEPENDENCY_EVERYTHING);
invalidate_analysis(DEPENDENCY_INSTRUCTIONS);
}

24
src/intel/compiler/brw_vec4.cpp
View File

@@ -496,7 +496,7 @@ vec4_visitor::opt_vector_float()
}
if (progress)
invalidate_analysis(DEPENDENCY_EVERYTHING);
invalidate_analysis(DEPENDENCY_INSTRUCTIONS);
return progress;
}
@@ -577,7 +577,7 @@ vec4_visitor::opt_reduce_swizzle()
}
if (progress)
invalidate_analysis(DEPENDENCY_EVERYTHING);
invalidate_analysis(DEPENDENCY_INSTRUCTION_DETAIL);
return progress;
}
@@ -904,7 +904,8 @@ vec4_visitor::opt_algebraic()
}
if (progress)
invalidate_analysis(DEPENDENCY_EVERYTHING);
invalidate_analysis(DEPENDENCY_INSTRUCTION_DATA_FLOW |
DEPENDENCY_INSTRUCTION_DETAIL);
return progress;
}
@@ -1474,7 +1475,7 @@ vec4_visitor::opt_register_coalesce()
}
if (progress)
invalidate_analysis(DEPENDENCY_EVERYTHING);
invalidate_analysis(DEPENDENCY_INSTRUCTIONS);
return progress;
}
@@ -1525,7 +1526,7 @@ vec4_visitor::eliminate_find_live_channel()
}
if (progress)
invalidate_analysis(DEPENDENCY_EVERYTHING);
invalidate_analysis(DEPENDENCY_INSTRUCTION_DETAIL);
return progress;
}
@@ -1601,7 +1602,7 @@ vec4_visitor::split_virtual_grfs()
}
}
}
invalidate_analysis(DEPENDENCY_EVERYTHING);
invalidate_analysis(DEPENDENCY_INSTRUCTION_DETAIL | DEPENDENCY_VARIABLES);
}
void
@@ -1904,7 +1905,7 @@ vec4_visitor::lower_minmax()
}
if (progress)
invalidate_analysis(DEPENDENCY_EVERYTHING);
invalidate_analysis(DEPENDENCY_INSTRUCTIONS);
return progress;
}
@@ -2040,7 +2041,8 @@ vec4_visitor::fixup_3src_null_dest()
}
if (progress)
invalidate_analysis(DEPENDENCY_EVERYTHING);
invalidate_analysis(DEPENDENCY_INSTRUCTION_DETAIL |
DEPENDENCY_VARIABLES);
}
void
@@ -2368,7 +2370,7 @@ vec4_visitor::lower_simd_width()
}
if (progress)
invalidate_analysis(DEPENDENCY_EVERYTHING);
invalidate_analysis(DEPENDENCY_INSTRUCTIONS | DEPENDENCY_VARIABLES);
return progress;
}
@@ -2525,7 +2527,7 @@ vec4_visitor::scalarize_df()
}
if (progress)
invalidate_analysis(DEPENDENCY_EVERYTHING);
invalidate_analysis(DEPENDENCY_INSTRUCTIONS);
return progress;
}
@@ -2568,7 +2570,7 @@ vec4_visitor::lower_64bit_mad_to_mul_add()
}
if (progress)
invalidate_analysis(DEPENDENCY_EVERYTHING);
invalidate_analysis(DEPENDENCY_INSTRUCTIONS | DEPENDENCY_VARIABLES);
return progress;
}

2
src/intel/compiler/brw_vec4_cmod_propagation.cpp
View File

@@ -357,7 +357,7 @@ vec4_visitor::opt_cmod_propagation()
}
if (progress)
invalidate_analysis(DEPENDENCY_EVERYTHING);
invalidate_analysis(DEPENDENCY_INSTRUCTIONS);
return progress;
}

3
src/intel/compiler/brw_vec4_copy_propagation.cpp
View File

@@ -559,7 +559,8 @@ vec4_visitor::opt_copy_propagation(bool do_constant_prop)
}
if (progress)
invalidate_analysis(DEPENDENCY_EVERYTHING);
invalidate_analysis(DEPENDENCY_INSTRUCTION_DATA_FLOW |
DEPENDENCY_INSTRUCTION_DETAIL);
return progress;
}

2
src/intel/compiler/brw_vec4_cse.cpp
View File

@@ -317,7 +317,7 @@ vec4_visitor::opt_cse()
}
if (progress)
invalidate_analysis(DEPENDENCY_EVERYTHING);
invalidate_analysis(DEPENDENCY_INSTRUCTIONS | DEPENDENCY_VARIABLES);
return progress;
}

2
src/intel/compiler/brw_vec4_dead_code_eliminate.cpp
View File

@@ -183,7 +183,7 @@ vec4_visitor::dead_code_eliminate()
ralloc_free(flag_live);
if (progress)
invalidate_analysis(DEPENDENCY_EVERYTHING);
invalidate_analysis(DEPENDENCY_INSTRUCTIONS);
return progress;
}

2
src/intel/compiler/brw_vec4_reg_allocate.cpp
View File

@@ -540,7 +540,7 @@ vec4_visitor::spill_reg(unsigned spill_reg_nr)
}
}
invalidate_analysis(DEPENDENCY_EVERYTHING);
invalidate_analysis(DEPENDENCY_INSTRUCTIONS | DEPENDENCY_VARIABLES);
}
} /* namespace brw */