ac: move ac_get_num_physical_vgprs into radeon_info
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com> Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
This commit is contained in:
@@ -597,6 +597,7 @@ bool ac_query_gpu_info(int fd, void *dev_p,
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else
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else
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info->num_physical_sgprs_per_simd = 512;
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info->num_physical_sgprs_per_simd = 512;
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info->num_physical_wave64_vgprs_per_simd = info->chip_class >= GFX10 ? 512 : 256;
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return true;
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return true;
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}
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}
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@@ -143,6 +143,7 @@ struct radeon_info {
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uint32_t max_sh_per_se; /* shader arrays per shader engine */
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uint32_t max_sh_per_se; /* shader arrays per shader engine */
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uint32_t max_wave64_per_simd;
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uint32_t max_wave64_per_simd;
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uint32_t num_physical_sgprs_per_simd;
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uint32_t num_physical_sgprs_per_simd;
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uint32_t num_physical_wave64_vgprs_per_simd;
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/* Render backends (color + depth blocks). */
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/* Render backends (color + depth blocks). */
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uint32_t r300_num_gb_pipes;
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uint32_t r300_num_gb_pipes;
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@@ -191,16 +192,6 @@ unsigned ac_get_compute_resource_limits(struct radeon_info *info,
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unsigned max_waves_per_sh,
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unsigned max_waves_per_sh,
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unsigned threadgroups_per_cu);
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unsigned threadgroups_per_cu);
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static inline unsigned ac_get_num_physical_vgprs(enum chip_class chip_class,
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unsigned wave_size)
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{
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/* The number is per SIMD. */
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if (chip_class >= GFX10)
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return wave_size == 32 ? 1024 : 512;
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else
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return 256;
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}
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#ifdef __cplusplus
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#ifdef __cplusplus
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}
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}
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#endif
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#endif
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@@ -5460,7 +5460,7 @@ static void si_calculate_max_simd_waves(struct si_shader *shader)
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if (conf->num_vgprs) {
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if (conf->num_vgprs) {
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/* Always print wave limits as Wave64, so that we can compare
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/* Always print wave limits as Wave64, so that we can compare
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* Wave32 and Wave64 with shader-db fairly. */
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* Wave32 and Wave64 with shader-db fairly. */
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unsigned max_vgprs = ac_get_num_physical_vgprs(sscreen->info.chip_class, 64);
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unsigned max_vgprs = sscreen->info.num_physical_wave64_vgprs_per_simd;
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max_simd_waves = MIN2(max_simd_waves, max_vgprs / conf->num_vgprs);
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max_simd_waves = MIN2(max_simd_waves, max_vgprs / conf->num_vgprs);
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}
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}
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@@ -7176,8 +7176,8 @@ int si_compile_tgsi_shader(struct si_screen *sscreen,
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*/
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*/
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if (sel->type == PIPE_SHADER_COMPUTE) {
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if (sel->type == PIPE_SHADER_COMPUTE) {
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unsigned wave_size = sscreen->compute_wave_size;
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unsigned wave_size = sscreen->compute_wave_size;
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unsigned max_vgprs = ac_get_num_physical_vgprs(sscreen->info.chip_class,
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unsigned max_vgprs = sscreen->info.num_physical_wave64_vgprs_per_simd *
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wave_size);
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(wave_size == 32 ? 2 : 1);
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unsigned max_sgprs = sscreen->info.num_physical_sgprs_per_simd;
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unsigned max_sgprs = sscreen->info.num_physical_sgprs_per_simd;
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unsigned max_sgprs_per_wave = 128;
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unsigned max_sgprs_per_wave = 128;
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unsigned simds_per_tg = 4; /* assuming WGP mode on gfx10 */
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unsigned simds_per_tg = 4; /* assuming WGP mode on gfx10 */
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