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aco: add VINTERP instruction format

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Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17333>
This commit is contained in:
Rhys Perry
2022-06-17 13:53:08 +01:00
committed by Marge Bot
parent 55cd74d468
commit aadb7aef01
12 changed files with 141 additions and 10 deletions
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7
src/amd/compiler/aco_ir.cpp
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@@ -441,6 +441,11 @@ can_use_opsel(amd_gfx_level gfx_level, aco_opcode op, int idx)
case aco_opcode::v_mad_i32_i16: return idx >= 0 && idx < 2;
case aco_opcode::v_dot2_f16_f16:
case aco_opcode::v_dot2_bf16_bf16: return idx == -1 || idx == 2;
// TODO: This matches what LLVM allows. We should see if this matches what the hardware allows.
case aco_opcode::v_interp_p10_f16_f32_inreg:
case aco_opcode::v_interp_p10_rtz_f16_f32_inreg: return idx == 0 || idx == 2;
case aco_opcode::v_interp_p2_f16_f32_inreg:
case aco_opcode::v_interp_p2_rtz_f16_f32_inreg: return idx == -1 || idx == 0;
default: return false;
}
}
@@ -448,6 +453,8 @@ can_use_opsel(amd_gfx_level gfx_level, aco_opcode op, int idx)
bool
instr_is_16bit(amd_gfx_level gfx_level, aco_opcode op)
{
// TODO: VINTERP (v_interp_p2_f16_f32, v_interp_p2_rtz_f16_f32)
/* partial register writes are GFX9+, only */
if (gfx_level < GFX9)
return false;