intel/brw: Reduce scope of some VS specific functions

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30169>
This commit is contained in:
Caio Oliveira
2024-07-12 17:30:10 -07:00
committed by Marge Bot
parent fdb029fe1b
commit a8b4b9dd51
3 changed files with 19 additions and 20 deletions

View File

@@ -11,6 +11,24 @@
using namespace brw;
static void
brw_assign_vs_urb_setup(fs_visitor &s)
{
struct brw_vs_prog_data *vs_prog_data = brw_vs_prog_data(s.prog_data);
assert(s.stage == MESA_SHADER_VERTEX);
/* Each attribute is 4 regs. */
s.first_non_payload_grf += 4 * vs_prog_data->nr_attribute_slots;
assert(vs_prog_data->base.urb_read_length <= 15);
/* Rewrite all ATTR file references to the hw grf that they land in. */
foreach_block_and_inst(block, fs_inst, inst, s.cfg) {
s.convert_attr_sources_to_hw_regs(inst);
}
}
static bool
run_vs(fs_visitor &s)
{
@@ -30,7 +48,7 @@ run_vs(fs_visitor &s)
brw_fs_optimize(s);
s.assign_curb_setup();
s.assign_vs_urb_setup();
brw_assign_vs_urb_setup(s);
brw_fs_lower_3src_null_dest(s);
brw_fs_workaround_memory_fence_before_eot(s);

View File

@@ -1576,24 +1576,6 @@ fs_visitor::convert_attr_sources_to_hw_regs(fs_inst *inst)
}
}
void
fs_visitor::assign_vs_urb_setup()
{
struct brw_vs_prog_data *vs_prog_data = brw_vs_prog_data(prog_data);
assert(stage == MESA_SHADER_VERTEX);
/* Each attribute is 4 regs. */
this->first_non_payload_grf += 4 * vs_prog_data->nr_attribute_slots;
assert(vs_prog_data->base.urb_read_length <= 15);
/* Rewrite all ATTR file references to the hw grf that they land in. */
foreach_block_and_inst(block, fs_inst, inst, cfg) {
convert_attr_sources_to_hw_regs(inst);
}
}
void
fs_visitor::assign_tcs_urb_setup()
{

View File

@@ -306,7 +306,6 @@ public:
void assign_curb_setup();
void assign_urb_setup();
void convert_attr_sources_to_hw_regs(fs_inst *inst);
void assign_vs_urb_setup();
void assign_tcs_urb_setup();
void assign_tes_urb_setup();
void assign_gs_urb_setup();