nir: introduce lowering of bitfield_insert to bfm and a new opcode bitfield_select.

bitfield_select is defined as:
bitfield_select(mask, base, insert) = (mask & base) | (~mask & insert)
matching the behavior of AMD's BFI instruction.

Reviewed-by: Connor Abbott <cwabbott0@gmail.com>

src/compiler/nir/nir.h

@@ -2288,6 +2288,8 @@ typedef struct nir_shader_compiler_options {
    bool lower_bitfield_insert;
    /** Lowers bitfield_insert to compares, and shifts. */
    bool lower_bitfield_insert_to_shifts;
+   /** Lowers bitfield_insert to bfm/bitfield_select. */
+   bool lower_bitfield_insert_to_bitfield_select;
    /** Lowers bitfield_reverse to shifts. */
    bool lower_bitfield_reverse;
    /** Lowers bit_count to shifts. */

src/compiler/nir/nir_opcodes.py

@@ -871,6 +871,9 @@ if (mask == 0) {
 }
 """)
 
+
+triop("bitfield_select", tuint, "", "(src0 & src1) | (~src0 & src2)")
+
 # SM5 ubfe/ibfe assembly: only the 5 least significant bits of offset and bits are used.
 opcode("ubfe", 0, tuint32,
        [0, 0, 0], [tuint32, tuint32, tuint32], False, "", """

src/compiler/nir/nir_opt_algebraic.py

@@ -799,6 +799,12 @@ optimizations.extend([
     ('iand', ('ishl', 'insert', 'offset'), ('ishl', ('isub', ('ishl', 1, 'bits'), 1), 'offset'))),
     'options->lower_bitfield_insert_to_shifts'),
 
+   # Alternative lowering that uses bitfield_select.
+   (('bitfield_insert', 'base', 'insert', 'offset', 'bits'),
+    ('bcsel', ('ult', 31, 'bits'), 'insert',
+              ('bitfield_select', ('bfm', 'bits', 'offset'), ('ishl', 'insert', 'offset'), 'base')),
+    'options->lower_bitfield_insert_to_bitfield_select'),
+
    (('ibitfield_extract', 'value', 'offset', 'bits'),
     ('bcsel', ('ult', 31, 'bits'), 'value',
               ('ibfe', 'value', 'offset', 'bits')),