From a74fbb38402c37fd2870a3dc6b25792cc2b53d1d Mon Sep 17 00:00:00 2001 From: Alyssa Rosenzweig Date: Mon, 28 Aug 2023 20:48:10 -0400 Subject: [PATCH] agx: Translate simple subgroup ops We'll use these for optimizing parallel prefix sums. Signed-off-by: Alyssa Rosenzweig Part-of: --- src/asahi/compiler/agx_compile.c | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/src/asahi/compiler/agx_compile.c b/src/asahi/compiler/agx_compile.c index b88bee797d4..c31d3174614 100644 --- a/src/asahi/compiler/agx_compile.c +++ b/src/asahi/compiler/agx_compile.c @@ -1207,6 +1207,26 @@ agx_emit_intrinsic(agx_builder *b, nir_intrinsic_instr *instr) return NULL; } + case nir_intrinsic_reduce: { + assert(nir_intrinsic_reduction_op(instr) == nir_op_iadd && + "other reductions todo"); + + return agx_simd_iadd_to(b, dst, agx_src_index(&instr->src[0])); + } + + case nir_intrinsic_exclusive_scan: { + assert(nir_intrinsic_reduction_op(instr) == nir_op_iadd && + "other reductions todo"); + + return agx_simd_prefix_iadd_to(b, dst, agx_src_index(&instr->src[0])); + } + + case nir_intrinsic_read_invocation: { + /* Lane ID guaranteed to be uniform */ + return agx_simd_shuffle_to(b, dst, agx_src_index(&instr->src[0]), + agx_src_index(&instr->src[1])); + } + case nir_intrinsic_load_barycentric_sample: case nir_intrinsic_load_sample_id: case nir_intrinsic_load_sample_pos: