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anv/cmd_buffer: Use the new emit macro for DEPTH/STENCIL_BUFFER

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Acked-by: Kristian Høgsberg <krh@bitplanet.net>
This commit is contained in:
Jason Ekstrand
2016-04-18 14:48:33 -07:00
parent 56453eeaff
commit a71ded0e18
1 changed files with 42 additions and 34 deletions
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76
src/intel/vulkan/genX_cmd_buffer.c
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@@ -924,28 +924,34 @@ cmd_buffer_emit_depth_stencil(struct anv_cmd_buffer *cmd_buffer)
/* Emit 3DSTATE_DEPTH_BUFFER */ /* Emit 3DSTATE_DEPTH_BUFFER */
if (has_depth) { if (has_depth) {
anv_batch_emit(&cmd_buffer->batch, GENX(3DSTATE_DEPTH_BUFFER), anv_batch_emit_blk(&cmd_buffer->batch, GENX(3DSTATE_DEPTH_BUFFER), db) {
.SurfaceType = SURFTYPE_2D, db.SurfaceType = SURFTYPE_2D;
.DepthWriteEnable = true, db.DepthWriteEnable = true;
.StencilWriteEnable = has_stencil, db.StencilWriteEnable = has_stencil;
.HierarchicalDepthBufferEnable = false, db.HierarchicalDepthBufferEnable = false;
.SurfaceFormat = isl_surf_get_depth_format(&device->isl_dev,
&image->depth_surface.isl), db.SurfaceFormat = isl_surf_get_depth_format(&device->isl_dev,
.SurfacePitch = image->depth_surface.isl.row_pitch - 1, &image->depth_surface.isl);
.SurfaceBaseAddress = {
db.SurfaceBaseAddress = (struct anv_address) {
.bo = image->bo, .bo = image->bo,
.offset = image->offset + image->depth_surface.offset, .offset = image->offset + image->depth_surface.offset,
}, };
.Height = fb->height - 1, db.DepthBufferObjectControlState = GENX(MOCS),
.Width = fb->width - 1,
.LOD = 0, db.SurfacePitch = image->depth_surface.isl.row_pitch - 1;
.Depth = 1 - 1, db.Height = fb->height - 1;
.MinimumArrayElement = 0, db.Width = fb->width - 1;
.DepthBufferObjectControlState = GENX(MOCS), db.LOD = 0;
db.Depth = 1 - 1;
db.MinimumArrayElement = 0;
#if GEN_GEN >= 8 #if GEN_GEN >= 8
.SurfaceQPitch = isl_surf_get_array_pitch_el_rows(&image->depth_surface.isl) >> 2, db.SurfaceQPitch =
isl_surf_get_array_pitch_el_rows(&image->depth_surface.isl) >> 2,
#endif #endif
.RenderTargetViewExtent = 1 - 1); db.RenderTargetViewExtent = 1 - 1;
}
} else { } else {
/* Even when no depth buffer is present, the hardware requires that /* Even when no depth buffer is present, the hardware requires that
* 3DSTATE_DEPTH_BUFFER be programmed correctly. The Broadwell PRM says: * 3DSTATE_DEPTH_BUFFER be programmed correctly. The Broadwell PRM says:
@@ -965,45 +971,47 @@ cmd_buffer_emit_depth_stencil(struct anv_cmd_buffer *cmd_buffer)
* nor stencil buffer is present. Also, D16_UNORM is not allowed to * nor stencil buffer is present. Also, D16_UNORM is not allowed to
* be combined with a stencil buffer so we use D32_FLOAT instead. * be combined with a stencil buffer so we use D32_FLOAT instead.
*/ */
anv_batch_emit(&cmd_buffer->batch, GENX(3DSTATE_DEPTH_BUFFER), anv_batch_emit_blk(&cmd_buffer->batch, GENX(3DSTATE_DEPTH_BUFFER), db) {
.SurfaceType = SURFTYPE_2D, db.SurfaceType = SURFTYPE_2D;
.SurfaceFormat = D32_FLOAT, db.SurfaceFormat = D32_FLOAT;
.Width = fb->width - 1, db.Width = fb->width - 1;
.Height = fb->height - 1, db.Height = fb->height - 1;
.StencilWriteEnable = has_stencil); db.StencilWriteEnable = has_stencil;
}
} }
/* Emit 3DSTATE_STENCIL_BUFFER */ /* Emit 3DSTATE_STENCIL_BUFFER */
if (has_stencil) { if (has_stencil) {
anv_batch_emit(&cmd_buffer->batch, GENX(3DSTATE_STENCIL_BUFFER), anv_batch_emit_blk(&cmd_buffer->batch, GENX(3DSTATE_STENCIL_BUFFER), sb) {
#if GEN_GEN >= 8 || GEN_IS_HASWELL #if GEN_GEN >= 8 || GEN_IS_HASWELL
.StencilBufferEnable = true, sb.StencilBufferEnable = true,
#endif #endif
.StencilBufferObjectControlState = GENX(MOCS), sb.StencilBufferObjectControlState = GENX(MOCS),
/* Stencil buffers have strange pitch. The PRM says: /* Stencil buffers have strange pitch. The PRM says:
* *
* The pitch must be set to 2x the value computed based on width, * The pitch must be set to 2x the value computed based on width,
* as the stencil buffer is stored with two rows interleaved. * as the stencil buffer is stored with two rows interleaved.
*/ */
.SurfacePitch = 2 * image->stencil_surface.isl.row_pitch - 1, sb.SurfacePitch = 2 * image->stencil_surface.isl.row_pitch - 1,
#if GEN_GEN >= 8 #if GEN_GEN >= 8
.SurfaceQPitch = isl_surf_get_array_pitch_el_rows(&image->stencil_surface.isl) >> 2, sb.SurfaceQPitch = isl_surf_get_array_pitch_el_rows(&image->stencil_surface.isl) >> 2,
#endif #endif
.SurfaceBaseAddress = { sb.SurfaceBaseAddress = (struct anv_address) {
.bo = image->bo, .bo = image->bo,
.offset = image->offset + image->stencil_surface.offset, .offset = image->offset + image->stencil_surface.offset,
}); };
}
} else { } else {
anv_batch_emit(&cmd_buffer->batch, GENX(3DSTATE_STENCIL_BUFFER)); anv_batch_emit_blk(&cmd_buffer->batch, GENX(3DSTATE_STENCIL_BUFFER), sb);
} }
/* Disable hierarchial depth buffers. */ /* Disable hierarchial depth buffers. */
anv_batch_emit(&cmd_buffer->batch, GENX(3DSTATE_HIER_DEPTH_BUFFER)); anv_batch_emit_blk(&cmd_buffer->batch, GENX(3DSTATE_HIER_DEPTH_BUFFER), hz);
/* Clear the clear params. */ /* Clear the clear params. */
anv_batch_emit(&cmd_buffer->batch, GENX(3DSTATE_CLEAR_PARAMS)); anv_batch_emit_blk(&cmd_buffer->batch, GENX(3DSTATE_CLEAR_PARAMS), cp);
} }
/** /**