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nir: Rename nir_intrinsic_load_local_group_size to nir_intrinsic_load_workgroup_size

Browse Source 
Acked-by: Emma Anholt <emma@anholt.net>
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11190>
This commit is contained in:
Caio Marcelo de Oliveira Filho
2021-05-27 14:44:54 -07:00
committed by Marge Bot
parent 43a6a2151b
commit a71a780598
24 changed files with 34 additions and 34 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
src/amd/llvm/ac_nir_to_llvm.c
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@@ -3417,7 +3417,7 @@ static void visit_intrinsic(struct ac_nir_context *ctx, nir_intrinsic_instr *ins
result = ctx->abi->load_base_vertex(ctx->abi,
instr->intrinsic == nir_intrinsic_load_base_vertex);
break;
case nir_intrinsic_load_local_group_size:
case nir_intrinsic_load_workgroup_size:
result = ctx->abi->load_local_group_size(ctx->abi);
break;
case nir_intrinsic_load_vertex_id:

4
src/compiler/nir/nir.c
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@@ -2020,7 +2020,7 @@ nir_intrinsic_from_system_value(gl_system_value val)
case SYSTEM_VALUE_SUBGROUP_ID:
return nir_intrinsic_load_subgroup_id;
case SYSTEM_VALUE_WORKGROUP_SIZE:
return nir_intrinsic_load_local_group_size;
return nir_intrinsic_load_workgroup_size;
case SYSTEM_VALUE_GLOBAL_INVOCATION_ID:
return nir_intrinsic_load_global_invocation_id;
case SYSTEM_VALUE_BASE_GLOBAL_INVOCATION_ID:
@@ -2150,7 +2150,7 @@ nir_system_value_from_intrinsic(nir_intrinsic_op intrin)
return SYSTEM_VALUE_NUM_SUBGROUPS;
case nir_intrinsic_load_subgroup_id:
return SYSTEM_VALUE_SUBGROUP_ID;
case nir_intrinsic_load_local_group_size:
case nir_intrinsic_load_workgroup_size:
return SYSTEM_VALUE_WORKGROUP_SIZE;
case nir_intrinsic_load_global_invocation_id:
return SYSTEM_VALUE_GLOBAL_INVOCATION_ID;

2
src/compiler/nir/nir_divergence_analysis.c
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@@ -102,7 +102,7 @@ visit_intrinsic(nir_shader *shader, nir_intrinsic_instr *instr)
case nir_intrinsic_load_push_constant:
case nir_intrinsic_load_work_dim:
case nir_intrinsic_load_num_work_groups:
case nir_intrinsic_load_local_group_size:
case nir_intrinsic_load_workgroup_size:
case nir_intrinsic_load_subgroup_id:
case nir_intrinsic_load_num_subgroups:
case nir_intrinsic_load_subgroup_size:

2
src/compiler/nir/nir_gather_info.c
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@@ -625,7 +625,7 @@ gather_intrinsic_info(nir_intrinsic_instr *instr, nir_shader *shader,
case nir_intrinsic_load_global_invocation_index:
case nir_intrinsic_load_work_group_id:
case nir_intrinsic_load_num_work_groups:
case nir_intrinsic_load_local_group_size:
case nir_intrinsic_load_workgroup_size:
case nir_intrinsic_load_work_dim:
case nir_intrinsic_load_user_data_amd:
case nir_intrinsic_load_view_index:

4
src/compiler/nir/nir_intrinsics.py
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@@ -702,9 +702,9 @@ system_value("subgroup_le_mask", 0, bit_sizes=[32, 64])
system_value("subgroup_lt_mask", 0, bit_sizes=[32, 64])
system_value("num_subgroups", 1)
system_value("subgroup_id", 1)
system_value("local_group_size", 3)
system_value("workgroup_size", 3)
# note: the definition of global_invocation_id_zero_base is based on
# (work_group_id * local_group_size) + local_invocation_id.
# (work_group_id * workgroup_size) + local_invocation_id.
# it is *not* based on work_group_id_zero_base, meaning the work group
# base is already accounted for, and the global base is additive on top of that
system_value("global_invocation_id", 3, bit_sizes=[32, 64])

12
src/compiler/nir/nir_lower_system_values.c
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@@ -54,7 +54,7 @@ sanitize_32bit_sysval(nir_builder *b, nir_intrinsic_instr *intrin)
static nir_ssa_def*
build_global_group_size(nir_builder *b, unsigned bit_size)
{
nir_ssa_def *group_size = nir_load_local_group_size(b);
nir_ssa_def *group_size = nir_load_workgroup_size(b);
nir_ssa_def *num_work_groups = nir_load_num_work_groups(b, bit_size);
return nir_imul(b, nir_u2u(b, group_size, bit_size),
num_work_groups);
@@ -116,7 +116,7 @@ lower_system_value_instr(nir_builder *b, nir_instr *instr, void *_state)
case nir_intrinsic_load_local_invocation_id:
case nir_intrinsic_load_local_invocation_index:
case nir_intrinsic_load_local_group_size:
case nir_intrinsic_load_workgroup_size:
return sanitize_32bit_sysval(b, intrin);
case nir_intrinsic_load_deref: {
@@ -294,7 +294,7 @@ lower_compute_system_value_instr(nir_builder *b,
* large so it can safely be omitted.
*/
nir_ssa_def *local_index = nir_load_local_invocation_index(b);
nir_ssa_def *local_size = nir_load_local_group_size(b);
nir_ssa_def *local_size = nir_load_workgroup_size(b);
/* Because no hardware supports a local workgroup size greater than
* about 1K, this calculation can be done in 32-bit and can save some
@@ -324,7 +324,7 @@ lower_compute_system_value_instr(nir_builder *b,
nir_ssa_def *size_x_imm;
if (b->shader->info.cs.workgroup_size_variable)
size_x_imm = nir_channel(b, nir_load_local_group_size(b), 0);
size_x_imm = nir_channel(b, nir_load_workgroup_size(b), 0);
else
size_x_imm = nir_imm_int(b, size_x);
@@ -424,7 +424,7 @@ lower_compute_system_value_instr(nir_builder *b,
return NULL;
}
case nir_intrinsic_load_local_group_size:
case nir_intrinsic_load_workgroup_size:
if (b->shader->info.cs.workgroup_size_variable) {
/* If the local work group size is variable it can't be lowered at
* this point. We do, however, have to make sure that the intrinsic
@@ -445,7 +445,7 @@ lower_compute_system_value_instr(nir_builder *b,
case nir_intrinsic_load_global_invocation_id_zero_base: {
if ((options && options->has_base_work_group_id) ||
!b->shader->options->has_cs_global_id) {
nir_ssa_def *group_size = nir_load_local_group_size(b);
nir_ssa_def *group_size = nir_load_workgroup_size(b);
nir_ssa_def *group_id = nir_load_work_group_id(b, bit_size);
nir_ssa_def *local_id = nir_load_local_invocation_id(b);

2
src/freedreno/ir3/ir3_compiler_nir.c
View File

@@ -2042,7 +2042,7 @@ emit_intrinsic(struct ir3_context *ctx, nir_intrinsic_instr *intr)
dst[i] = create_driver_param(ctx, IR3_DP_NUM_WORK_GROUPS_X + i);
}
break;
case nir_intrinsic_load_local_group_size:
case nir_intrinsic_load_workgroup_size:
for (int i = 0; i < dest_components; i++) {
dst[i] = create_driver_param(ctx, IR3_DP_LOCAL_GROUP_SIZE_X + i);
}

2
src/freedreno/ir3/ir3_nir.c
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@@ -680,7 +680,7 @@ ir3_nir_scan_driver_consts(nir_shader *shader,
layout->num_driver_params =
MAX2(layout->num_driver_params, IR3_DP_NUM_WORK_GROUPS_Z + 1);
break;
case nir_intrinsic_load_local_group_size:
case nir_intrinsic_load_workgroup_size:
layout->num_driver_params =
MAX2(layout->num_driver_params, IR3_DP_LOCAL_GROUP_SIZE_Z + 1);
break;

2
src/gallium/auxiliary/gallivm/lp_bld_nir.c
View File

@@ -1696,7 +1696,7 @@ static void visit_intrinsic(struct lp_build_nir_context *bld_base,
case nir_intrinsic_load_invocation_id:
case nir_intrinsic_load_front_face:
case nir_intrinsic_load_draw_id:
case nir_intrinsic_load_local_group_size:
case nir_intrinsic_load_workgroup_size:
case nir_intrinsic_load_work_dim:
case nir_intrinsic_load_tess_coord:
case nir_intrinsic_load_tess_level_outer:

2
src/gallium/auxiliary/gallivm/lp_bld_nir_soa.c
View File

@@ -1552,7 +1552,7 @@ static void emit_sysval_intrin(struct lp_build_nir_context *bld_base,
break;
default:
break;
case nir_intrinsic_load_local_group_size:
case nir_intrinsic_load_workgroup_size:
for (unsigned i = 0; i < 3; i++)
result[i] = lp_build_broadcast_scalar(&bld_base->uint_bld, LLVMBuildExtractElement(gallivm->builder, bld->system_values.block_size, lp_build_const_int32(gallivm, i), ""));
break;

2
src/gallium/auxiliary/nir/nir_to_tgsi.c
View File

@@ -1652,7 +1652,7 @@ ntt_emit_intrinsic(struct ntt_compile *c, nir_intrinsic_instr *instr)
case nir_intrinsic_load_local_invocation_id:
case nir_intrinsic_load_work_group_id:
case nir_intrinsic_load_num_work_groups:
case nir_intrinsic_load_local_group_size:
case nir_intrinsic_load_workgroup_size:
case nir_intrinsic_load_subgroup_size:
case nir_intrinsic_load_subgroup_invocation:
case nir_intrinsic_load_subgroup_eq_mask:

2
src/gallium/auxiliary/nir/nir_to_tgsi_info.c
View File

@@ -223,7 +223,7 @@ static void scan_instruction(const struct nir_shader *nir,
case nir_intrinsic_load_num_work_groups:
info->uses_grid_size = true;
break;
case nir_intrinsic_load_local_group_size:
case nir_intrinsic_load_workgroup_size:
/* The block size is translated to IMM with a fixed block size. */
if (info->properties[TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH] == 0)
info->uses_block_size = true;

2
src/gallium/auxiliary/nir/tgsi_to_nir.c
View File

@@ -623,7 +623,7 @@ ttn_src_for_file_and_index(struct ttn_compile *c, unsigned file, unsigned index,
load = nir_load_work_group_id(b, 32);
break;
case TGSI_SEMANTIC_BLOCK_SIZE:
load = nir_load_local_group_size(b);
load = nir_load_workgroup_size(b);
break;
case TGSI_SEMANTIC_CS_USER_DATA_AMD:
load = nir_load_user_data_amd(b);

2
src/gallium/drivers/iris/iris_program.c
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@@ -527,7 +527,7 @@ iris_setup_uniforms(const struct brw_compiler *compiler,
nir_intrinsic_base(intrin) * 16));
break;
}
case nir_intrinsic_load_local_group_size: {
case nir_intrinsic_load_workgroup_size: {
assert(nir->info.cs.workgroup_size_variable);
if (variable_group_size_idx == -1) {
variable_group_size_idx = num_system_values;

4
src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp
View File

@@ -1566,7 +1566,7 @@ Converter::convert(nir_intrinsic_op intr)
return SV_INSTANCE_ID;
case nir_intrinsic_load_invocation_id:
return SV_INVOCATION_ID;
case nir_intrinsic_load_local_group_size:
case nir_intrinsic_load_workgroup_size:
return SV_NTID;
case nir_intrinsic_load_local_invocation_id:
return SV_TID;
@@ -1843,7 +1843,7 @@ Converter::visit(nir_intrinsic_instr *insn)
case nir_intrinsic_load_helper_invocation:
case nir_intrinsic_load_instance_id:
case nir_intrinsic_load_invocation_id:
case nir_intrinsic_load_local_group_size:
case nir_intrinsic_load_workgroup_size:
case nir_intrinsic_load_local_invocation_id:
case nir_intrinsic_load_num_work_groups:
case nir_intrinsic_load_patch_vertices_in:

2
src/gallium/drivers/radeonsi/si_shaderlib_nir.c
View File

@@ -43,7 +43,7 @@ static nir_ssa_def *get_global_ids(nir_builder *b, unsigned num_components)
nir_ssa_def *local_ids = nir_channels(b, nir_load_local_invocation_id(b), mask);
nir_ssa_def *block_ids = nir_channels(b, nir_load_work_group_id(b, 32), mask);
nir_ssa_def *block_size = nir_channels(b, nir_load_local_group_size(b), mask);
nir_ssa_def *block_size = nir_channels(b, nir_load_workgroup_size(b), mask);
return nir_iadd(b, nir_imul(b, block_ids, block_size), local_ids);
}

2
src/gallium/drivers/zink/nir_to_spirv/nir_to_spirv.c
View File

@@ -2785,7 +2785,7 @@ emit_intrinsic(struct ntv_context *ctx, nir_intrinsic_instr *intr)
emit_load_uint_input(ctx, intr, &ctx->local_invocation_index_var, "gl_LocalInvocationIndex", SpvBuiltInLocalInvocationIndex);
break;
case nir_intrinsic_load_local_group_size: {
case nir_intrinsic_load_workgroup_size: {
assert(ctx->local_group_size_var);
store_dest(ctx, &intr->dest, ctx->local_group_size_var, nir_type_uint);
break;

2
src/intel/compiler/brw_fs_nir.cpp
View File

@@ -3814,7 +3814,7 @@ fs_visitor::nir_emit_cs_intrinsic(const fs_builder &bld,
break;
}
case nir_intrinsic_load_local_group_size: {
case nir_intrinsic_load_workgroup_size: {
assert(compiler->lower_variable_group_size);
assert(nir->info.cs.workgroup_size_variable);
for (unsigned i = 0; i < 3; i++) {

6
src/intel/compiler/brw_nir_lower_cs_intrinsics.c
View File

@@ -53,7 +53,7 @@ lower_cs_intrinsics_convert_block(struct lower_intrinsics_state *state,
nir_ssa_def *sysval;
switch (intrinsic->intrinsic) {
case nir_intrinsic_load_local_group_size:
case nir_intrinsic_load_workgroup_size:
case nir_intrinsic_load_work_group_id:
case nir_intrinsic_load_num_work_groups:
/* Convert this to 32-bit if it's not */
@@ -82,7 +82,7 @@ lower_cs_intrinsics_convert_block(struct lower_intrinsics_state *state,
nir_ssa_def *size_x;
nir_ssa_def *size_y;
if (state->nir->info.cs.workgroup_size_variable) {
nir_ssa_def *size_xyz = nir_load_local_group_size(b);
nir_ssa_def *size_xyz = nir_load_workgroup_size(b);
size_x = nir_channel(b, size_xyz, 0);
size_y = nir_channel(b, size_xyz, 1);
} else {
@@ -214,7 +214,7 @@ lower_cs_intrinsics_convert_block(struct lower_intrinsics_state *state,
case nir_intrinsic_load_num_subgroups: {
nir_ssa_def *size;
if (state->nir->info.cs.workgroup_size_variable) {
nir_ssa_def *size_xyz = nir_load_local_group_size(b);
nir_ssa_def *size_xyz = nir_load_workgroup_size(b);
nir_ssa_def *size_x = nir_channel(b, size_xyz, 0);
nir_ssa_def *size_y = nir_channel(b, size_xyz, 1);
nir_ssa_def *size_z = nir_channel(b, size_xyz, 2);

2
src/microsoft/clc/clc_nir.c
View File

@@ -146,7 +146,7 @@ clc_nir_lower_system_values(nir_shader *nir, nir_variable *var)
case nir_intrinsic_load_work_dim:
progress |= lower_load_work_dim(&b, intr, var);
break;
case nir_intrinsic_load_local_group_size:
case nir_intrinsic_load_workgroup_size:
lower_load_local_group_size(&b, intr);
break;
case nir_intrinsic_load_num_work_groups:

2
src/microsoft/compiler/nir_to_dxil.c
View File

@@ -3456,7 +3456,7 @@ emit_intrinsic(struct ntd_context *ctx, nir_intrinsic_instr *intr)
return emit_load_vulkan_descriptor(ctx, intr);
case nir_intrinsic_load_num_work_groups:
case nir_intrinsic_load_local_group_size:
case nir_intrinsic_load_workgroup_size:
default:
NIR_INSTR_UNSUPPORTED(&intr->instr);
assert("Unimplemented intrinsic instruction");

2
src/panfrost/bifrost/bifrost_compile.c
View File

@@ -1177,7 +1177,7 @@ bi_emit_intrinsic(bi_builder *b, nir_intrinsic_instr *instr)
case nir_intrinsic_load_viewport_scale:
case nir_intrinsic_load_viewport_offset:
case nir_intrinsic_load_num_work_groups:
case nir_intrinsic_load_local_group_size:
case nir_intrinsic_load_workgroup_size:
bi_load_sysval_nir(b, instr, 3, 0);
break;

2
src/panfrost/midgard/midgard_compile.c
View File

@@ -2025,7 +2025,7 @@ emit_intrinsic(compiler_context *ctx, nir_intrinsic_instr *instr)
case nir_intrinsic_load_viewport_offset:
case nir_intrinsic_load_num_work_groups:
case nir_intrinsic_load_sampler_lod_parameters_pan:
case nir_intrinsic_load_local_group_size:
case nir_intrinsic_load_workgroup_size:
emit_sysval_read(ctx, &instr->instr, 3, 0);
break;

2
src/panfrost/util/pan_sysval.c
View File

@@ -72,7 +72,7 @@ panfrost_nir_sysval_for_intrinsic(nir_intrinsic_instr *instr)
return PAN_SYSVAL_VIEWPORT_OFFSET;
case nir_intrinsic_load_num_work_groups:
return PAN_SYSVAL_NUM_WORK_GROUPS;
case nir_intrinsic_load_local_group_size:
case nir_intrinsic_load_workgroup_size:
return PAN_SYSVAL_LOCAL_GROUP_SIZE;
case nir_intrinsic_load_work_dim:
return PAN_SYSVAL_WORK_DIM;