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radeonsi: implement nir_load_ring_attr_amd

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Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19429>
This commit is contained in:
Qiang Yu
2022-10-27 15:34:44 +08:00
committed by Marge Bot
parent 3aaf7c103e
commit a6f86d003b
3 changed files with 37 additions and 26 deletions
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1
src/gallium/drivers/radeonsi/si_shader_internal.h
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@@ -231,6 +231,7 @@ bool si_llvm_compile_shader(struct si_screen *sscreen, struct ac_llvm_compiler *
struct si_shader *shader, const struct pipe_stream_output_info *so,
struct util_debug_callback *debug, struct nir_shader *nir,
bool free_nir);
LLVMValueRef si_llvm_build_attr_ring_desc(struct si_shader_context *ctx);
/* si_shader_llvm_gs.c */
LLVMValueRef si_is_es_thread(struct si_shader_context *ctx);

35
src/gallium/drivers/radeonsi/si_shader_llvm.c
View File

@@ -732,6 +732,38 @@ static LLVMValueRef si_get_num_vertices_per_prim(struct si_shader_context *ctx)
return LLVMConstInt(ctx->ac.i32, num_vertices, false);
}
LLVMValueRef si_llvm_build_attr_ring_desc(struct si_shader_context *ctx)
{
struct si_shader *shader = ctx->shader;
LLVMValueRef attr_address;
if (ctx->stage == MESA_SHADER_VERTEX && shader->selector->info.base.vs.blit_sgprs_amd) {
struct ac_llvm_pointer ring_ptr = ac_get_ptr_arg(&ctx->ac, &ctx->args, ctx->internal_bindings);
ring_ptr.pointee_type = ctx->ac.i32;
attr_address = ac_build_load_to_sgpr(&ctx->ac, ring_ptr,
LLVMConstInt(ctx->ac.i32, SI_GS_ATTRIBUTE_RING * 4, 0));
} else {
attr_address = ac_get_arg(&ctx->ac, ctx->gs_attr_address);
}
unsigned stride = 16 * shader->info.nr_param_exports;
LLVMValueRef attr_desc[4] = {
attr_address,
LLVMConstInt(ctx->ac.i32, S_008F04_BASE_ADDRESS_HI(ctx->screen->info.address32_hi) |
S_008F04_STRIDE(stride) |
S_008F04_SWIZZLE_ENABLE_GFX11(3) /* 16B */, 0),
LLVMConstInt(ctx->ac.i32, 0xffffffff, 0),
LLVMConstInt(ctx->ac.i32, S_008F0C_DST_SEL_X(V_008F0C_SQ_SEL_X) |
S_008F0C_DST_SEL_Y(V_008F0C_SQ_SEL_Y) |
S_008F0C_DST_SEL_Z(V_008F0C_SQ_SEL_Z) |
S_008F0C_DST_SEL_W(V_008F0C_SQ_SEL_W) |
S_008F0C_FORMAT(V_008F0C_GFX11_FORMAT_32_32_32_32_FLOAT) |
S_008F0C_INDEX_STRIDE(2) /* 32 elements */, 0),
};
return ac_build_gather_values(&ctx->ac, attr_desc, 4);
}
static LLVMValueRef si_llvm_load_intrinsic(struct ac_shader_abi *abi, nir_intrinsic_op op)
{
struct si_shader_context *ctx = si_shader_context_from_abi(abi);
@@ -884,6 +916,9 @@ static LLVMValueRef si_llvm_load_intrinsic(struct ac_shader_abi *abi, nir_intrin
return LLVMBuildTrunc(ctx->ac.builder, enabled, ctx->ac.i1, "");
}
case nir_intrinsic_load_ring_attr_amd:
return si_llvm_build_attr_ring_desc(ctx);
default:
return NULL;
}

27
src/gallium/drivers/radeonsi/si_shader_llvm_vs.c
View File

@@ -743,32 +743,7 @@ void si_llvm_build_vs_exports(struct si_shader_context *ctx, LLVMValueRef num_ex
LLVMBuildICmp(ctx->ac.builder, LLVMIntULT,
ac_get_thread_id(&ctx->ac), num_export_threads, ""), 0);
/* Get the attribute ring address and descriptor. */
LLVMValueRef attr_address;
if (ctx->stage == MESA_SHADER_VERTEX && shader->selector->info.base.vs.blit_sgprs_amd) {
struct ac_llvm_pointer ring_ptr = ac_get_ptr_arg(&ctx->ac, &ctx->args, ctx->internal_bindings);
ring_ptr.pointee_type = ctx->ac.i32;
attr_address = ac_build_load_to_sgpr(&ctx->ac, ring_ptr,
LLVMConstInt(ctx->ac.i32, SI_GS_ATTRIBUTE_RING * 4, 0));
} else {
attr_address = ac_get_arg(&ctx->ac, ctx->gs_attr_address);
}
unsigned stride = 16 * shader->info.nr_param_exports;
LLVMValueRef attr_desc[4] = {
attr_address,
LLVMConstInt(ctx->ac.i32, S_008F04_BASE_ADDRESS_HI(ctx->screen->info.address32_hi) |
S_008F04_STRIDE(stride) |
S_008F04_SWIZZLE_ENABLE_GFX11(3) /* 16B */, 0),
LLVMConstInt(ctx->ac.i32, 0xffffffff, 0),
LLVMConstInt(ctx->ac.i32, S_008F0C_DST_SEL_X(V_008F0C_SQ_SEL_X) |
S_008F0C_DST_SEL_Y(V_008F0C_SQ_SEL_Y) |
S_008F0C_DST_SEL_Z(V_008F0C_SQ_SEL_Z) |
S_008F0C_DST_SEL_W(V_008F0C_SQ_SEL_W) |
S_008F0C_FORMAT(V_008F0C_GFX11_FORMAT_32_32_32_32_FLOAT) |
S_008F0C_INDEX_STRIDE(2) /* 32 elements */, 0),
};
LLVMValueRef attr_rsrc = ac_build_gather_values(&ctx->ac, attr_desc, 4);
LLVMValueRef attr_rsrc = si_llvm_build_attr_ring_desc(ctx);
LLVMValueRef attr_offset = LLVMBuildShl(ctx->ac.builder,
si_unpack_param(ctx, ctx->args.gs_attr_offset, 0, 15),
LLVMConstInt(ctx->ac.i32, 9, 0), ""); /* 512B increments */