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radeonsi: remove the cache_flush atom

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Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
This commit is contained in:
Marek Olšák
2016-09-08 00:59:55 +02:00
parent f9750932ea
commit a67d81580b
7 changed files with 9 additions and 12 deletions
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2
src/gallium/drivers/radeonsi/si_compute.c
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@@ -474,7 +474,7 @@ static void si_launch_grid(
si_initialize_compute(sctx);
if (sctx->b.flags)
si_emit_cache_flush(sctx, NULL);
si_emit_cache_flush(sctx);
if (!si_switch_compute_shader(sctx, program, &program->shader, info->pc))
return;

2
src/gallium/drivers/radeonsi/si_cp_dma.c
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@@ -170,7 +170,7 @@ static void si_cp_dma_prepare(struct si_context *sctx, struct pipe_resource *dst
* Also wait for the previous CP DMA operations.
*/
if (sctx->b.flags) {
si_emit_cache_flush(sctx, NULL);
si_emit_cache_flush(sctx);
*flags |= SI_CP_DMA_RAW_WAIT;
}

2
src/gallium/drivers/radeonsi/si_hw_context.c
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@@ -115,7 +115,7 @@ void si_context_gfx_flush(void *context, unsigned flags,
ctx->b.flags |= SI_CONTEXT_INV_GLOBAL_L2 |
SI_CONTEXT_INV_VMEM_L1;
si_emit_cache_flush(ctx, NULL);
si_emit_cache_flush(ctx);
if (ctx->trace_buf)
si_trace_emit(ctx);

1
src/gallium/drivers/radeonsi/si_pipe.h
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@@ -229,7 +229,6 @@ struct si_context {
union si_state emitted;
/* Atom declarations. */
struct r600_atom cache_flush;
struct si_framebuffer framebuffer;
struct si_sample_locs msaa_sample_locs;
struct r600_atom db_render_state;

1
src/gallium/drivers/radeonsi/si_state.c
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@@ -3441,7 +3441,6 @@ void si_init_state_functions(struct si_context *sctx)
si_init_external_atom(sctx, &sctx->b.scissors.atom, &sctx->atoms.s.scissors);
si_init_external_atom(sctx, &sctx->b.viewports.atom, &sctx->atoms.s.viewports);
si_init_atom(sctx, &sctx->cache_flush, &sctx->atoms.s.cache_flush, si_emit_cache_flush);
si_init_atom(sctx, &sctx->framebuffer.atom, &sctx->atoms.s.framebuffer, si_emit_framebuffer_state);
si_init_atom(sctx, &sctx->msaa_sample_locs.atom, &sctx->atoms.s.msaa_sample_locs, si_emit_msaa_sample_locs);
si_init_atom(sctx, &sctx->db_render_state, &sctx->atoms.s.db_render_state, si_emit_db_render_state);

3
src/gallium/drivers/radeonsi/si_state.h
View File

@@ -124,7 +124,6 @@ union si_state {
union si_state_atoms {
struct {
/* The order matters. */
struct r600_atom *cache_flush;
struct r600_atom *render_cond;
struct r600_atom *streamout_begin;
struct r600_atom *streamout_enable; /* must be after streamout_begin */
@@ -343,7 +342,7 @@ void si_destroy_shader_cache(struct si_screen *sscreen);
void si_init_shader_selector_async(void *job, int thread_index);
/* si_state_draw.c */
void si_emit_cache_flush(struct si_context *sctx, struct r600_atom *atom);
void si_emit_cache_flush(struct si_context *sctx);
void si_ce_pre_draw_synchronization(struct si_context *sctx);
void si_ce_post_draw_synchronization(struct si_context *sctx);
void si_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info *dinfo);

10
src/gallium/drivers/radeonsi/si_state_draw.c
View File

@@ -706,7 +706,7 @@ static void si_emit_draw_packets(struct si_context *sctx,
}
}
void si_emit_cache_flush(struct si_context *sctx, struct r600_atom *atom)
void si_emit_cache_flush(struct si_context *sctx)
{
struct r600_common_context *rctx = &sctx->b;
struct radeon_winsys_cs *cs = rctx->gfx.cs;
@@ -1029,10 +1029,6 @@ void si_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info *info)
r600_resource(info->indirect_params)->TC_L2_dirty = false;
}
/* Check flush flags. */
if (sctx->b.flags)
si_mark_atom_dirty(sctx, sctx->atoms.s.cache_flush);
/* Add buffer sizes for memory checking in need_cs_space. */
if (sctx->emit_scratch_reloc && sctx->scratch_buffer)
r600_context_add_resource_size(ctx, &sctx->scratch_buffer->b.b);
@@ -1048,6 +1044,10 @@ void si_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info *info)
if (!si_upload_vertex_buffer_descriptors(sctx))
return;
/* Flushed caches prior to emitting states. */
if (sctx->b.flags)
si_emit_cache_flush(sctx);
/* Emit states. */
mask = sctx->dirty_atoms;
while (mask) {