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anv: Split ANV_BO_ALLOC_HOST_CACHED_COHERENT into two actual flags

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As suggested by Lionel, here adding ANV_BO_ALLOC_HOST_COHERENT
and with that ANV_BO_ALLOC_HOST_CACHED_COHERENT is now defined by
(ANV_BO_ALLOC_HOST_COHERENT | ANV_BO_ALLOC_HOST_CACHED).

In some callers of anv_device_alloc_bo() was necessary to add
ANV_BO_ALLOC_HOST_COHERENT as no other flag was set and that
was the default behavior up to now.

A change that could look not related is the removal of the
intel_flush_range() in anv_device_init_trivial_batch(), that was done
because trivial_batch_bo is HOST_COHERENT so no flush is necessary.
And it did not made sense to make it ANV_BO_ALLOC_HOST_CACHED_COHERENT
as it was never read in CPU.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26457>
This commit is contained in:
José Roberto de Souza
2023-11-30 10:05:58 -08:00
committed by Marge Bot
parent 0eac6298f2
commit a65e982b44
5 changed files with 45 additions and 33 deletions
Download Patch File Download Diff File Expand all files Collapse all files

24
src/intel/vulkan/anv_allocator.c
View File

@@ -1443,7 +1443,7 @@ anv_bo_get_mmap_mode(struct anv_device *device, struct anv_bo *bo)
* LLC in older platforms DRM_IOCTL_I915_GEM_SET_CACHING needs to be
* supported and set.
*/
if (alloc_flags & ANV_BO_ALLOC_HOST_CACHED_COHERENT)
if (alloc_flags & ANV_BO_ALLOC_HOST_CACHED)
return INTEL_DEVICE_INFO_MMAP_MODE_WB;
return INTEL_DEVICE_INFO_MMAP_MODE_WC;
@@ -1463,9 +1463,15 @@ anv_device_alloc_bo(struct anv_device *device,
uint64_t explicit_address,
struct anv_bo **bo_out)
{
/* bo can only be one: cached+coherent, cached(incoherent) or coherent(no flags) */
assert(!(!!(alloc_flags & ANV_BO_ALLOC_HOST_CACHED_COHERENT) &&
!!(alloc_flags & ANV_BO_ALLOC_HOST_CACHED)));
/* bo that needs CPU access needs to be HOST_CACHED, HOST_COHERENT or both */
assert((alloc_flags & ANV_BO_ALLOC_MAPPED) == 0 ||
(alloc_flags & (ANV_BO_ALLOC_HOST_CACHED | ANV_BO_ALLOC_HOST_COHERENT)));
/* KMD requires a valid PAT index, so setting HOST_COHERENT/WC to bos that
* don't need CPU access
*/
if ((alloc_flags & ANV_BO_ALLOC_MAPPED) == 0)
alloc_flags |= ANV_BO_ALLOC_HOST_COHERENT;
const uint32_t bo_flags =
device->kmd_backend->bo_alloc_flags_to_bo_flags(device, alloc_flags);
@@ -1594,7 +1600,8 @@ anv_device_import_bo_from_host_ptr(struct anv_device *device,
struct anv_bo **bo_out)
{
assert(!(alloc_flags & (ANV_BO_ALLOC_MAPPED |
ANV_BO_ALLOC_HOST_CACHED_COHERENT |
ANV_BO_ALLOC_HOST_CACHED |
ANV_BO_ALLOC_HOST_COHERENT |
ANV_BO_ALLOC_DEDICATED |
ANV_BO_ALLOC_PROTECTED |
ANV_BO_ALLOC_FIXED_ADDRESS)));
@@ -1651,7 +1658,7 @@ anv_device_import_bo_from_host_ptr(struct anv_device *device,
__sync_fetch_and_add(&bo->refcount, 1);
} else {
/* Makes sure that userptr gets WB mmap caching and right VM PAT index */
/* Makes sure that userptr gets WB+1way host caching */
alloc_flags |= (ANV_BO_ALLOC_HOST_CACHED_COHERENT | ANV_BO_ALLOC_NO_LOCAL_MEM);
struct anv_bo new_bo = {
.name = "host-ptr",
@@ -1698,7 +1705,8 @@ anv_device_import_bo(struct anv_device *device,
struct anv_bo **bo_out)
{
assert(!(alloc_flags & (ANV_BO_ALLOC_MAPPED |
ANV_BO_ALLOC_HOST_CACHED_COHERENT |
ANV_BO_ALLOC_HOST_CACHED |
ANV_BO_ALLOC_HOST_COHERENT |
ANV_BO_ALLOC_FIXED_ADDRESS)));
assert(alloc_flags & ANV_BO_ALLOC_EXTERNAL);
@@ -1741,7 +1749,7 @@ anv_device_import_bo(struct anv_device *device,
__sync_fetch_and_add(&bo->refcount, 1);
} else {
/* so imported bos get WB and correct PAT index */
/* so imported bos get WB+1way host caching */
alloc_flags |= (ANV_BO_ALLOC_HOST_CACHED_COHERENT | ANV_BO_ALLOC_NO_LOCAL_MEM);
struct anv_bo new_bo = {
.name = "imported",

31
src/intel/vulkan/anv_device.c
View File

@@ -2929,7 +2929,8 @@ static VkResult
anv_device_init_trivial_batch(struct anv_device *device)
{
VkResult result = anv_device_alloc_bo(device, "trivial-batch", 4096,
ANV_BO_ALLOC_MAPPED,
ANV_BO_ALLOC_MAPPED |
ANV_BO_ALLOC_HOST_COHERENT,
0 /* explicit_address */,
&device->trivial_batch_bo);
if (result != VK_SUCCESS)
@@ -2944,11 +2945,6 @@ anv_device_init_trivial_batch(struct anv_device *device)
anv_batch_emit(&batch, GFX7_MI_BATCH_BUFFER_END, bbe);
anv_batch_emit(&batch, GFX7_MI_NOOP, noop);
#ifdef SUPPORT_INTEL_INTEGRATED_GPUS
if (device->physical->memory.need_flush)
intel_flush_range(batch.start, batch.next - batch.start);
#endif
return VK_SUCCESS;
}
@@ -3515,6 +3511,7 @@ VkResult anv_CreateDevice(
result = anv_device_alloc_bo(device, "workaround", 8192,
ANV_BO_ALLOC_CAPTURE |
ANV_BO_ALLOC_HOST_COHERENT |
ANV_BO_ALLOC_MAPPED,
0 /* explicit_address */,
&device->workaround_bo);
@@ -4161,14 +4158,6 @@ VkResult anv_AllocateMemory(
if (mem->vk.export_handle_types || mem->vk.import_handle_type)
alloc_flags |= (ANV_BO_ALLOC_EXTERNAL | ANV_BO_ALLOC_IMPLICIT_SYNC);
if ((alloc_flags & (ANV_BO_ALLOC_EXTERNAL | ANV_BO_ALLOC_SCANOUT)) == 0) {
if ((mem_type->propertyFlags & VK_MEMORY_PROPERTY_HOST_COHERENT_BIT) &&
(mem_type->propertyFlags & VK_MEMORY_PROPERTY_HOST_CACHED_BIT))
alloc_flags |= ANV_BO_ALLOC_HOST_CACHED_COHERENT;
else if (mem_type->propertyFlags & VK_MEMORY_PROPERTY_HOST_CACHED_BIT)
alloc_flags |= ANV_BO_ALLOC_HOST_CACHED;
}
if (mem->vk.ahardware_buffer) {
result = anv_import_ahw_memory(_device, mem);
if (result != VK_SUCCESS)
@@ -4245,6 +4234,18 @@ VkResult anv_AllocateMemory(
goto success;
}
if (alloc_flags & (ANV_BO_ALLOC_EXTERNAL | ANV_BO_ALLOC_SCANOUT)) {
alloc_flags |= ANV_BO_ALLOC_HOST_COHERENT;
} else if (mem_type->propertyFlags & VK_MEMORY_PROPERTY_HOST_VISIBLE_BIT) {
if (mem_type->propertyFlags & VK_MEMORY_PROPERTY_HOST_COHERENT_BIT)
alloc_flags |= ANV_BO_ALLOC_HOST_COHERENT;
if (mem_type->propertyFlags & VK_MEMORY_PROPERTY_HOST_CACHED_BIT)
alloc_flags |= ANV_BO_ALLOC_HOST_CACHED;
} else {
/* Required to set some host mode to have a valid pat index set */
alloc_flags |= ANV_BO_ALLOC_HOST_COHERENT;
}
/* Regular allocate (not importing memory). */
result = anv_device_alloc_bo(device, "user", pAllocateInfo->allocationSize,
@@ -5212,7 +5213,7 @@ anv_device_get_pat_entry(struct anv_device *device,
return &device->info->pat.writecombining;
}
if (alloc_flags & (ANV_BO_ALLOC_HOST_CACHED_COHERENT))
if ((alloc_flags & (ANV_BO_ALLOC_HOST_CACHED_COHERENT)) == ANV_BO_ALLOC_HOST_CACHED_COHERENT)
return &device->info->pat.cached_coherent;
else if (alloc_flags & (ANV_BO_ALLOC_EXTERNAL | ANV_BO_ALLOC_SCANOUT))
return &device->info->pat.scanout;

17
src/intel/vulkan/anv_private.h
View File

@@ -375,8 +375,12 @@ enum anv_bo_alloc_flags {
/** Specifies that the BO should be mapped */
ANV_BO_ALLOC_MAPPED = (1 << 2),
/** Specifies that the BO should be cached and coherent */
ANV_BO_ALLOC_HOST_CACHED_COHERENT = (1 << 3),
/** Specifies that the BO should be coherent.
*
* Note: In platforms with LLC where HOST_CACHED + HOST_COHERENT is free,
* bo can get upgraded to HOST_CACHED_COHERENT
*/
ANV_BO_ALLOC_HOST_COHERENT = (1 << 3),
/** Specifies that the BO should be captured in error states */
ANV_BO_ALLOC_CAPTURE = (1 << 4),
@@ -426,15 +430,14 @@ enum anv_bo_alloc_flags {
/** Protected buffer */
ANV_BO_ALLOC_PROTECTED = (1 << 15),
/** Specifies that the BO should be cached and incoherent.
*
* If ANV_BO_ALLOC_HOST_CACHED or ANV_BO_ALLOC_HOST_CACHED_COHERENT are not
* set it will allocate a coherent BO.
**/
/** Specifies that the BO should be cached and incoherent. */
ANV_BO_ALLOC_HOST_CACHED = (1 << 16),
/** For sampler pools */
ANV_BO_ALLOC_SAMPLER_POOL = (1 << 17),
/** Specifies that the BO should be cached and coherent. */
ANV_BO_ALLOC_HOST_CACHED_COHERENT = (ANV_BO_ALLOC_HOST_COHERENT | ANV_BO_ALLOC_HOST_CACHED),
};
struct anv_bo {

4
src/intel/vulkan/i915/anv_kmd_backend.c
View File

@@ -59,7 +59,7 @@ i915_gem_create(struct anv_device *device,
if (intel_ioctl(device->fd, DRM_IOCTL_I915_GEM_CREATE, &gem_create))
return 0;
if (alloc_flags & ANV_BO_ALLOC_HOST_CACHED_COHERENT) {
if ((alloc_flags & ANV_BO_ALLOC_HOST_CACHED_COHERENT) == ANV_BO_ALLOC_HOST_CACHED_COHERENT) {
/* We don't want to change these defaults if it's going to be shared
* with another process.
*/
@@ -128,7 +128,7 @@ i915_gem_create(struct anv_device *device,
*actual_size = gem_create.size;
if (alloc_flags & ANV_BO_ALLOC_HOST_CACHED_COHERENT) {
if ((alloc_flags & ANV_BO_ALLOC_HOST_CACHED_COHERENT) == ANV_BO_ALLOC_HOST_CACHED_COHERENT) {
/* We don't want to change these defaults if it's going to be shared
* with another process.
*/

2
src/intel/vulkan/xe/anv_kmd_backend.c
View File

@@ -43,7 +43,7 @@ xe_gem_create(struct anv_device *device,
/* TODO: protected content */
assert((alloc_flags & ANV_BO_ALLOC_PROTECTED) == 0);
/* WB+0 way coherent not supported by Xe KMD */
assert((alloc_flags & ANV_BO_ALLOC_HOST_CACHED) == 0);
assert(alloc_flags & ANV_BO_ALLOC_HOST_COHERENT);
uint32_t flags = 0;
if (alloc_flags & ANV_BO_ALLOC_SCANOUT)