intel/eu: Start validating LSC message descriptors
This is certainly not a full validation but it at least gets the framework in place and validates one hard-to-find restriction. Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11657>
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@@ -2028,6 +2028,44 @@ instruction_restrictions(const struct intel_device_info *devinfo,
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return error_msg;
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}
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static struct string
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send_descriptor_restrictions(const struct intel_device_info *devinfo,
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const brw_inst *inst)
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{
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struct string error_msg = { .str = NULL, .len = 0 };
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if (inst_is_split_send(devinfo, inst)) {
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/* We can only validate immediate descriptors */
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if (brw_inst_send_sel_reg32_desc(devinfo, inst))
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return error_msg;
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} else if (inst_is_send(devinfo, inst)) {
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/* We can only validate immediate descriptors */
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if (brw_inst_src1_reg_file(devinfo, inst) != BRW_IMMEDIATE_VALUE)
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return error_msg;
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} else {
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return error_msg;
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}
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const uint32_t desc = brw_inst_send_desc(devinfo, inst);
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switch (brw_inst_sfid(devinfo, inst)) {
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case GFX12_SFID_TGM:
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case GFX12_SFID_SLM:
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case GFX12_SFID_UGM:
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ERROR_IF(!devinfo->has_lsc, "Platform does not support LSC");
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ERROR_IF(lsc_msg_desc_transpose(devinfo, desc) &&
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brw_inst_exec_size(devinfo, inst) != BRW_EXECUTE_1,
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"Transposed vectors are restricted to Exec_Mask = 1.");
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break;
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default:
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break;
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}
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return error_msg;
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}
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bool
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brw_validate_instruction(const struct intel_device_info *devinfo,
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const brw_inst *inst, int offset,
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@@ -2051,6 +2089,7 @@ brw_validate_instruction(const struct intel_device_info *devinfo,
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CHECK(vector_immediate_restrictions);
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CHECK(special_requirements_for_handling_double_precision_data_types);
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CHECK(instruction_restrictions);
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CHECK(send_descriptor_restrictions);
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}
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}
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