diff --git a/src/amd/common/ac_nir_lower_resinfo.c b/src/amd/common/ac_nir_lower_resinfo.c
index 2ee014d90d5..42925b9592a 100644
--- a/src/amd/common/ac_nir_lower_resinfo.c
+++ b/src/amd/common/ac_nir_lower_resinfo.c
@@ -116,7 +116,7 @@ lower_query_size(nir_builder *b, nir_ssa_def *desc, nir_src *lod,
     */
    if (gfx_level >= GFX10_3 && (has_depth || is_array)) {
       nir_ssa_def *type = get_field(b, desc, 3, ~C_00A00C_TYPE);
-      nir_ssa_def *is_2d = nir_ieq(b, type, nir_imm_int(b, V_008F1C_SQ_RSRC_IMG_2D));
+      nir_ssa_def *is_2d = nir_ieq_imm(b, type, V_008F1C_SQ_RSRC_IMG_2D);
 
       if (has_depth)
          depth = nir_bcsel(b, is_2d, nir_imm_int(b, 0), depth);
diff --git a/src/intel/compiler/brw_nir_lower_rt_intrinsics.c b/src/intel/compiler/brw_nir_lower_rt_intrinsics.c
index 9235033df7a..aad14cf445d 100644
--- a/src/intel/compiler/brw_nir_lower_rt_intrinsics.c
+++ b/src/intel/compiler/brw_nir_lower_rt_intrinsics.c
@@ -39,8 +39,8 @@ build_leaf_is_procedural(nir_builder *b, struct brw_nir_rt_mem_hit_defs *hit)
       return nir_imm_true(b);
 
    default:
-      return nir_ieq(b, hit->leaf_type,
-                        nir_imm_int(b, BRW_RT_BVH_NODE_TYPE_PROCEDURAL));
+      return nir_ieq_imm(b, hit->leaf_type,
+                            BRW_RT_BVH_NODE_TYPE_PROCEDURAL);
    }
 }
 
diff --git a/src/intel/vulkan/anv_pipeline.c b/src/intel/vulkan/anv_pipeline.c
index 575ee285aaf..75c510ea37b 100644
--- a/src/intel/vulkan/anv_pipeline.c
+++ b/src/intel/vulkan/anv_pipeline.c
@@ -64,8 +64,7 @@ anv_nir_prim_count_store(nir_builder *b, nir_ssa_def *val)
 
    nir_ssa_def *local_invocation_index = nir_build_load_local_invocation_index(b);
 
-   nir_ssa_def *cmp = nir_ieq(b, local_invocation_index,
-                                  nir_imm_int(b, 0));
+   nir_ssa_def *cmp = nir_ieq_imm(b, local_invocation_index, 0);
    nir_if *if_stmt = nir_push_if(b, cmp);
    {
       nir_deref_instr *prim_count_deref = nir_build_deref_var(b, primitive_count);