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radeonsi: fix invalidating bindless buffer descriptors

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The VA is stored at [4:5], not [0:1]. This invalidated all
texture buffer descriptors when they were made resident in
the current context.

This removes few partial flushes and cache invalidations which
are needed when updating a bindless descriptor on the fly with
a WRITE_DATA packet.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
This commit is contained in:
Samuel Pitoiset
2017-06-30 18:48:12 +02:00
parent 43dea65ad2
commit a584a12308
1 changed files with 2 additions and 2 deletions
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4
src/gallium/drivers/radeonsi/si_descriptors.c
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@@ -2361,7 +2361,7 @@ static void si_invalidate_bindless_buf_desc(struct si_context *sctx,
uint64_t offset)
{
struct r600_resource *buf = r600_resource(resource);
uint32_t *desc_list = desc->desc_list;
uint32_t *desc_list = desc->desc_list + 4;
uint64_t old_desc_va;
assert(resource->target == PIPE_BUFFER);
@@ -2374,7 +2374,7 @@ static void si_invalidate_bindless_buf_desc(struct si_context *sctx,
/* The buffer has been invalidated when the handle wasn't
* resident, update the descriptor and the dirty flag.
*/
si_set_buf_desc_address(buf, offset, &desc_list[4]);
si_set_buf_desc_address(buf, offset, &desc_list[0]);
desc->dirty = true;
sctx->bindless_descriptors_dirty = true;