OpenHarmony/third_party_mesa3d
2
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

i965: Use brw->urb.min_vs_urb_entries instead of 32 for BLORP.

Browse Source 
Haswell GT2 and GT3 have a minimum of 64 entries.  Hardcoding 32
is not legal.

v2: Delete stale comment (caught by Alejandro).

Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
This commit is contained in:
Kenneth Graunke
2016-03-31 00:53:21 -07:00
parent 58d4751fa0
commit a57320a9ba
1 changed files with 1 additions and 4 deletions
Download Patch File Download Diff File Expand all files Collapse all files

5
src/mesa/drivers/dri/i965/gen7_blorp.cpp
View File

@@ -55,11 +55,8 @@ gen7_blorp_emit_urb_config(struct brw_context *brw)
0 /* gs_size */,
urb_size / 2 /* fs_size */);
/* The minimum valid number of VS entries is 32. See 3DSTATE_URB_VS, Dword
* 1.15:0 "VS Number of URB Entries".
*/
gen7_emit_urb_state(brw,
32 /* num_vs_entries */,
brw->urb.min_vs_entries /* num_vs_entries */,
2 /* vs_size */,
2 /* vs_start */,
0 /* num_hs_entries */,