anv/xe2: Enable compute walker and BTD thread preemption

GFX versions older than GFX 20 have 'Thread Preemption disable' while
GFX 20 has 'Thread Preemption' with value flipped in compute walker
instruction.
So here by default enabling thread preemption, only disabling it
when BTD mode is enabled as instructed in Wa_14017794102.

Similar for 3DSTATE_BTD, enabling preemption by default and
only disabling when platform is affected by Wa_14017794102.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29616>

src/intel/genxml/gen20.xml

@@ -64,7 +64,7 @@
       <value name="Ftz" value="0" />
       <value name="SetByKernel" value="1" />
     </field>
-    <field name="Thread Preemption" start="84" end="84" type="bool" />
+    <field name="Thread Preemption" start="84" end="84" type="bool" default="1" />
     <field name="Sampler Count" start="98" end="100" type="uint">
       <value name="No samplers used" value="0" />
       <value name="Between 1 and 4 samplers used" value="1" />
@@ -342,7 +342,7 @@
       <value name="512" value="2" />
       <value name="1024" value="3" />
     </field>
-    <field name="BTD Mid thread preemption" start="63" end="63" type="bool" />
+    <field name="BTD Mid thread preemption" start="63" end="63" type="bool" default="1" />
     <field name="Per DSS Memory Backed Buffer Size" start="64" end="66" type="uint" default="6">
       <value name="2KB" value="0" />
       <value name="4KB" value="1" />

src/intel/vulkan/genX_cmd_compute.c

@@ -1043,6 +1043,9 @@ cmd_buffer_trace_rays(struct anv_cmd_buffer *cmd_buffer,
                                       pipeline->base.scratch_size);
          btd.ScratchSpaceBuffer = scratch_surf >> 4;
       }
+#if INTEL_NEEDS_WA_14017794102
+      btd.BTDMidthreadpreemption = false;
+#endif
    }
 
    genX(cmd_buffer_ensure_cfe_state)(cmd_buffer, pipeline->base.scratch_size);
@@ -1079,6 +1082,9 @@ cmd_buffer_trace_rays(struct anv_cmd_buffer *cmd_buffer,
          .BindingTablePointer = surfaces->offset,
          .NumberofThreadsinGPGPUThreadGroup = 1,
          .BTDMode = true,
+#if INTEL_NEEDS_WA_14017794102
+         .ThreadPreemption = false,
+#endif
       };
 
       struct brw_rt_raygen_trampoline_params trampoline_params = {

src/intel/vulkan/genX_init_state.c

@@ -330,6 +330,9 @@ init_common_queue_state(struct anv_queue *queue, struct anv_batch *batch)
              */
             .offset = device->btd_fifo_bo->offset,
          };
+#if INTEL_NEEDS_WA_14017794102
+         btd.BTDMidthreadpreemption = false;
+#endif
       }
    }
 #endif