nir: move to compiler/
Signed-off-by: Emil Velikov <emil.velikov@collabora.com> Acked-by: Matt Turner <mattst88@gmail.com> Acked-by: Jose Fonseca <jfonseca@vmware.com>
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Emil Velikov
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Emil Velikov
Emil Velikov
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src/compiler/nir/nir_intrinsics.h
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316
src/compiler/nir/nir_intrinsics.h
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/*
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* Copyright © 2014 Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*
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* Authors:
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* Connor Abbott (cwabbott0@gmail.com)
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*
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*/
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/**
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* This header file defines all the available intrinsics in one place. It
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* expands to a list of macros of the form:
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*
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* INTRINSIC(name, num_srcs, src_components, has_dest, dest_components,
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* num_variables, num_indices, flags)
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*
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* Which should correspond one-to-one with the nir_intrinsic_info structure. It
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* is included in both ir.h to create the nir_intrinsic enum (with members of
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* the form nir_intrinsic_(name)) and and in opcodes.c to create
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* nir_intrinsic_infos, which is a const array of nir_intrinsic_info structures
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* for each intrinsic.
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*/
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#define ARR(...) { __VA_ARGS__ }
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INTRINSIC(load_var, 0, ARR(), true, 0, 1, 0, NIR_INTRINSIC_CAN_ELIMINATE)
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INTRINSIC(store_var, 1, ARR(0), false, 0, 1, 1, 0)
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INTRINSIC(copy_var, 0, ARR(), false, 0, 2, 0, 0)
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/*
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* Interpolation of input. The interp_var_at* intrinsics are similar to the
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* load_var intrinsic acting an a shader input except that they interpolate
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* the input differently. The at_sample and at_offset intrinsics take an
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* aditional source that is a integer sample id or a vec2 position offset
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* respectively.
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*/
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INTRINSIC(interp_var_at_centroid, 0, ARR(0), true, 0, 1, 0,
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NIR_INTRINSIC_CAN_ELIMINATE | NIR_INTRINSIC_CAN_REORDER)
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INTRINSIC(interp_var_at_sample, 1, ARR(1), true, 0, 1, 0,
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NIR_INTRINSIC_CAN_ELIMINATE | NIR_INTRINSIC_CAN_REORDER)
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INTRINSIC(interp_var_at_offset, 1, ARR(2), true, 0, 1, 0,
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NIR_INTRINSIC_CAN_ELIMINATE | NIR_INTRINSIC_CAN_REORDER)
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/*
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* Ask the driver for the size of a given buffer. It takes the buffer index
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* as source.
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*/
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INTRINSIC(get_buffer_size, 1, ARR(1), true, 1, 0, 0,
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NIR_INTRINSIC_CAN_ELIMINATE | NIR_INTRINSIC_CAN_REORDER)
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/*
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* a barrier is an intrinsic with no inputs/outputs but which can't be moved
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* around/optimized in general
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*/
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#define BARRIER(name) INTRINSIC(name, 0, ARR(), false, 0, 0, 0, 0)
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BARRIER(barrier)
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BARRIER(discard)
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/*
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* Memory barrier with semantics analogous to the memoryBarrier() GLSL
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* intrinsic.
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*/
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BARRIER(memory_barrier)
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/*
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* Shader clock intrinsic with semantics analogous to the clock2x32ARB()
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* GLSL intrinsic.
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* The latter can be used as code motion barrier, which is currently not
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* feasible with NIR.
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*/
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INTRINSIC(shader_clock, 0, ARR(), true, 1, 0, 0, NIR_INTRINSIC_CAN_ELIMINATE)
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/*
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* Memory barrier with semantics analogous to the compute shader
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* groupMemoryBarrier(), memoryBarrierAtomicCounter(), memoryBarrierBuffer(),
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* memoryBarrierImage() and memoryBarrierShared() GLSL intrinsics.
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*/
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BARRIER(group_memory_barrier)
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BARRIER(memory_barrier_atomic_counter)
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BARRIER(memory_barrier_buffer)
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BARRIER(memory_barrier_image)
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BARRIER(memory_barrier_shared)
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/** A conditional discard, with a single boolean source. */
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INTRINSIC(discard_if, 1, ARR(1), false, 0, 0, 0, 0)
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/**
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* Basic Geometry Shader intrinsics.
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*
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* emit_vertex implements GLSL's EmitStreamVertex() built-in. It takes a single
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* index, which is the stream ID to write to.
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*
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* end_primitive implements GLSL's EndPrimitive() built-in.
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*/
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INTRINSIC(emit_vertex, 0, ARR(), false, 0, 0, 1, 0)
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INTRINSIC(end_primitive, 0, ARR(), false, 0, 0, 1, 0)
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/**
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* Geometry Shader intrinsics with a vertex count.
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*
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* Alternatively, drivers may implement these intrinsics, and use
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* nir_lower_gs_intrinsics() to convert from the basic intrinsics.
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*
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* These maintain a count of the number of vertices emitted, as an additional
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* unsigned integer source.
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*/
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INTRINSIC(emit_vertex_with_counter, 1, ARR(1), false, 0, 0, 1, 0)
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INTRINSIC(end_primitive_with_counter, 1, ARR(1), false, 0, 0, 1, 0)
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INTRINSIC(set_vertex_count, 1, ARR(1), false, 0, 0, 0, 0)
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/*
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* Atomic counters
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*
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* The *_var variants take an atomic_uint nir_variable, while the other,
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* lowered, variants take a constant buffer index and register offset.
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*/
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#define ATOMIC(name, flags) \
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INTRINSIC(atomic_counter_##name##_var, 0, ARR(), true, 1, 1, 0, flags) \
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INTRINSIC(atomic_counter_##name, 1, ARR(1), true, 1, 0, 1, flags)
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ATOMIC(inc, 0)
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ATOMIC(dec, 0)
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ATOMIC(read, NIR_INTRINSIC_CAN_ELIMINATE)
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/*
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* Image load, store and atomic intrinsics.
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*
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* All image intrinsics take an image target passed as a nir_variable. Image
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* variables contain a number of memory and layout qualifiers that influence
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* the semantics of the intrinsic.
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*
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* All image intrinsics take a four-coordinate vector and a sample index as
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* first two sources, determining the location within the image that will be
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* accessed by the intrinsic. Components not applicable to the image target
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* in use are undefined. Image store takes an additional four-component
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* argument with the value to be written, and image atomic operations take
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* either one or two additional scalar arguments with the same meaning as in
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* the ARB_shader_image_load_store specification.
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*/
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INTRINSIC(image_load, 2, ARR(4, 1), true, 4, 1, 0,
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NIR_INTRINSIC_CAN_ELIMINATE)
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INTRINSIC(image_store, 3, ARR(4, 1, 4), false, 0, 1, 0, 0)
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INTRINSIC(image_atomic_add, 3, ARR(4, 1, 1), true, 1, 1, 0, 0)
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INTRINSIC(image_atomic_min, 3, ARR(4, 1, 1), true, 1, 1, 0, 0)
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INTRINSIC(image_atomic_max, 3, ARR(4, 1, 1), true, 1, 1, 0, 0)
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INTRINSIC(image_atomic_and, 3, ARR(4, 1, 1), true, 1, 1, 0, 0)
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INTRINSIC(image_atomic_or, 3, ARR(4, 1, 1), true, 1, 1, 0, 0)
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INTRINSIC(image_atomic_xor, 3, ARR(4, 1, 1), true, 1, 1, 0, 0)
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INTRINSIC(image_atomic_exchange, 3, ARR(4, 1, 1), true, 1, 1, 0, 0)
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INTRINSIC(image_atomic_comp_swap, 4, ARR(4, 1, 1, 1), true, 1, 1, 0, 0)
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INTRINSIC(image_size, 0, ARR(), true, 4, 1, 0,
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NIR_INTRINSIC_CAN_ELIMINATE | NIR_INTRINSIC_CAN_REORDER)
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INTRINSIC(image_samples, 0, ARR(), true, 1, 1, 0,
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NIR_INTRINSIC_CAN_ELIMINATE | NIR_INTRINSIC_CAN_REORDER)
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/*
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* SSBO atomic intrinsics
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*
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* All of the SSBO atomic memory operations read a value from memory,
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* compute a new value using one of the operations below, write the new
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* value to memory, and return the original value read.
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*
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* All operations take 3 sources except CompSwap that takes 4. These
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* sources represent:
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*
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* 0: The SSBO buffer index.
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* 1: The offset into the SSBO buffer of the variable that the atomic
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* operation will operate on.
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* 2: The data parameter to the atomic function (i.e. the value to add
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* in ssbo_atomic_add, etc).
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* 3: For CompSwap only: the second data parameter.
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*/
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INTRINSIC(ssbo_atomic_add, 3, ARR(1, 1, 1), true, 1, 0, 0, 0)
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INTRINSIC(ssbo_atomic_imin, 3, ARR(1, 1, 1), true, 1, 0, 0, 0)
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INTRINSIC(ssbo_atomic_umin, 3, ARR(1, 1, 1), true, 1, 0, 0, 0)
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INTRINSIC(ssbo_atomic_imax, 3, ARR(1, 1, 1), true, 1, 0, 0, 0)
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INTRINSIC(ssbo_atomic_umax, 3, ARR(1, 1, 1), true, 1, 0, 0, 0)
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INTRINSIC(ssbo_atomic_and, 3, ARR(1, 1, 1), true, 1, 0, 0, 0)
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INTRINSIC(ssbo_atomic_or, 3, ARR(1, 1, 1), true, 1, 0, 0, 0)
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INTRINSIC(ssbo_atomic_xor, 3, ARR(1, 1, 1), true, 1, 0, 0, 0)
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INTRINSIC(ssbo_atomic_exchange, 3, ARR(1, 1, 1), true, 1, 0, 0, 0)
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INTRINSIC(ssbo_atomic_comp_swap, 4, ARR(1, 1, 1, 1), true, 1, 0, 0, 0)
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/*
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* CS shared variable atomic intrinsics
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*
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* All of the shared variable atomic memory operations read a value from
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* memory, compute a new value using one of the operations below, write the
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* new value to memory, and return the original value read.
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*
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* All operations take 2 sources except CompSwap that takes 3. These
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* sources represent:
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*
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* 0: The offset into the shared variable storage region that the atomic
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* operation will operate on.
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* 1: The data parameter to the atomic function (i.e. the value to add
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* in shared_atomic_add, etc).
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* 2: For CompSwap only: the second data parameter.
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*/
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INTRINSIC(shared_atomic_add, 2, ARR(1, 1), true, 1, 0, 0, 0)
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INTRINSIC(shared_atomic_imin, 2, ARR(1, 1), true, 1, 0, 0, 0)
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INTRINSIC(shared_atomic_umin, 2, ARR(1, 1), true, 1, 0, 0, 0)
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INTRINSIC(shared_atomic_imax, 2, ARR(1, 1), true, 1, 0, 0, 0)
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INTRINSIC(shared_atomic_umax, 2, ARR(1, 1), true, 1, 0, 0, 0)
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INTRINSIC(shared_atomic_and, 2, ARR(1, 1), true, 1, 0, 0, 0)
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INTRINSIC(shared_atomic_or, 2, ARR(1, 1), true, 1, 0, 0, 0)
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INTRINSIC(shared_atomic_xor, 2, ARR(1, 1), true, 1, 0, 0, 0)
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INTRINSIC(shared_atomic_exchange, 2, ARR(1, 1), true, 1, 0, 0, 0)
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INTRINSIC(shared_atomic_comp_swap, 3, ARR(1, 1, 1), true, 1, 0, 0, 0)
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#define SYSTEM_VALUE(name, components, num_indices) \
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INTRINSIC(load_##name, 0, ARR(), true, components, 0, num_indices, \
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NIR_INTRINSIC_CAN_ELIMINATE | NIR_INTRINSIC_CAN_REORDER)
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SYSTEM_VALUE(front_face, 1, 0)
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SYSTEM_VALUE(vertex_id, 1, 0)
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SYSTEM_VALUE(vertex_id_zero_base, 1, 0)
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SYSTEM_VALUE(base_vertex, 1, 0)
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SYSTEM_VALUE(instance_id, 1, 0)
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SYSTEM_VALUE(base_instance, 1, 0)
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SYSTEM_VALUE(draw_id, 1, 0)
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SYSTEM_VALUE(sample_id, 1, 0)
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SYSTEM_VALUE(sample_pos, 2, 0)
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SYSTEM_VALUE(sample_mask_in, 1, 0)
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SYSTEM_VALUE(primitive_id, 1, 0)
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SYSTEM_VALUE(invocation_id, 1, 0)
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SYSTEM_VALUE(tess_coord, 3, 0)
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SYSTEM_VALUE(tess_level_outer, 4, 0)
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SYSTEM_VALUE(tess_level_inner, 2, 0)
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SYSTEM_VALUE(patch_vertices_in, 1, 0)
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SYSTEM_VALUE(local_invocation_id, 3, 0)
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SYSTEM_VALUE(work_group_id, 3, 0)
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SYSTEM_VALUE(user_clip_plane, 4, 1) /* const_index[0] is user_clip_plane[idx] */
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SYSTEM_VALUE(num_work_groups, 3, 0)
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SYSTEM_VALUE(helper_invocation, 1, 0)
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/*
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* Load operations pull data from some piece of GPU memory. All load
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* operations operate in terms of offsets into some piece of theoretical
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* memory. Loads from externally visible memory (UBO and SSBO) simply take a
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* byte offset as a source. Loads from opaque memory (uniforms, inputs, etc.)
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* take a base+offset pair where the base (const_index[0]) gives the location
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* of the start of the variable being loaded and and the offset source is a
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* offset into that variable.
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*
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* Some load operations such as UBO/SSBO load and per_vertex loads take an
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* additional source to specify which UBO/SSBO/vertex to load from.
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*
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* The exact address type depends on the lowering pass that generates the
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* load/store intrinsics. Typically, this is vec4 units for things such as
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* varying slots and float units for fragment shader inputs. UBO and SSBO
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* offsets are always in bytes.
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*/
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#define LOAD(name, srcs, indices, flags) \
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INTRINSIC(load_##name, srcs, ARR(1, 1, 1, 1), true, 0, 0, indices, flags)
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/* src[] = { offset }. const_index[] = { base } */
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LOAD(uniform, 1, 1, NIR_INTRINSIC_CAN_ELIMINATE | NIR_INTRINSIC_CAN_REORDER)
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/* src[] = { buffer_index, offset }. No const_index */
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LOAD(ubo, 2, 0, NIR_INTRINSIC_CAN_ELIMINATE | NIR_INTRINSIC_CAN_REORDER)
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/* src[] = { offset }. const_index[] = { base } */
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LOAD(input, 1, 1, NIR_INTRINSIC_CAN_ELIMINATE | NIR_INTRINSIC_CAN_REORDER)
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/* src[] = { vertex, offset }. const_index[] = { base } */
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LOAD(per_vertex_input, 2, 1, NIR_INTRINSIC_CAN_ELIMINATE | NIR_INTRINSIC_CAN_REORDER)
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/* src[] = { buffer_index, offset }. No const_index */
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LOAD(ssbo, 2, 0, NIR_INTRINSIC_CAN_ELIMINATE)
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/* src[] = { offset }. const_index[] = { base } */
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LOAD(output, 1, 1, NIR_INTRINSIC_CAN_ELIMINATE)
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/* src[] = { vertex, offset }. const_index[] = { base } */
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LOAD(per_vertex_output, 2, 1, NIR_INTRINSIC_CAN_ELIMINATE)
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/* src[] = { offset }. const_index[] = { base } */
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LOAD(shared, 1, 1, NIR_INTRINSIC_CAN_ELIMINATE)
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/*
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* Stores work the same way as loads, except now the first source is the value
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* to store and the second (and possibly third) source specify where to store
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* the value. SSBO and shared memory stores also have a write mask as
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* const_index[0].
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*/
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#define STORE(name, srcs, indices, flags) \
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INTRINSIC(store_##name, srcs, ARR(0, 1, 1, 1), false, 0, 0, indices, flags)
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/* src[] = { value, offset }. const_index[] = { base, write_mask } */
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STORE(output, 2, 2, 0)
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/* src[] = { value, vertex, offset }. const_index[] = { base, write_mask } */
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STORE(per_vertex_output, 3, 2, 0)
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/* src[] = { value, block_index, offset }. const_index[] = { write_mask } */
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STORE(ssbo, 3, 1, 0)
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/* src[] = { value, offset }. const_index[] = { base, write_mask } */
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STORE(shared, 2, 2, 0)
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LAST_INTRINSIC(store_shared)
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