intel/fs: optimize uniform SSBO & shared loads
Using divergence analysis, figure out when SSBO & shared memory loads are uniform and carry the data only once in register space. Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21853>
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@@ -187,6 +187,9 @@ bool brw_nir_opt_peephole_imul32x16(nir_shader *shader);
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bool brw_nir_clamp_per_vertex_loads(nir_shader *shader,
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unsigned input_vertices);
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bool brw_nir_blockify_uniform_loads(nir_shader *shader,
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const struct intel_device_info *devinfo);
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void brw_nir_optimize(nir_shader *nir,
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const struct brw_compiler *compiler,
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bool is_scalar);
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