agx: Model control flow instructions
Thankfully the encoding is regular, if a bit complicated. Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11023>
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committed by
Alyssa Rosenzweig

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4fe03cf97c
commit
a270665a9e
@@ -88,6 +88,7 @@ ICOND = immediate("icond")
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FCOND = immediate("fcond")
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NEST = immediate("nest")
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INVERT_COND = immediate("invert_cond")
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NEST = immediate("nest")
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TARGET = immediate("target", "agx_block *")
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FUNOP = lambda x: (x << 28)
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@@ -182,6 +183,19 @@ op("ld_tile", (0x49, 0x7F, 8, _), dests = 1, srcs = 0,
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op("st_tile", (0x09, 0x7F, 8, _), dests = 0, srcs = 1,
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can_eliminate = False, imms = [FORMAT])
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# TODO: model implicit r0l destinations
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for is_float in [False, True]:
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mod_mask = 0 if is_float else (0x3 << 26) | (0x3 << 38)
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for (cf, cf_op) in [("if", 0), ("else", 1), ("while", 2)]:
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name = "{}_{}cmp".format(cf, "f" if is_float else "i")
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exact = 0x42 | (0x0 if is_float else 0x10) | (cf_op << 9)
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mask = 0x7F | (0x3 << 9) | mod_mask | (0x3 << 44)
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imms = [NEST, FCOND if is_float else ICOND, INVERT_COND]
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op(name, (exact, mask, 6, _), dests = 0, srcs = 2, can_eliminate = False,
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imms = imms, is_float = is_float)
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op("bitop", (0x7E, 0x7F, 6, _), srcs = 2, imms = [TRUTH_TABLE])
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op("convert", (0x3E | L, 0x7F | L | (0x3 << 38), 6, _), srcs = 2, imms = [ROUND])
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op("ld_vary", (0x21, 0x3F, 8, _), srcs = 1, imms = [CHANNELS])
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