radv: fix allocating/uploading the trap handler shader

Since shaders are allocated per pipeline, the trap handler shader
was not uploaded at all.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14950>

src/amd/vulkan/radv_debug.c

@@ -891,7 +891,7 @@ radv_trap_handler_finish(struct radv_device *device)
    struct radeon_winsys *ws = device->ws;
 
    if (unlikely(device->trap_handler_shader)) {
-      radv_shader_destroy(device, device->trap_handler_shader);
+      radv_trap_handler_shader_destroy(device, device->trap_handler_shader);
    }
 
    if (unlikely(device->tma_bo)) {

src/amd/vulkan/radv_private.h

@@ -840,7 +840,7 @@ struct radv_device {
    struct ac_perfcounters perfcounters;
 
    /* Trap handler. */
-   struct radv_shader *trap_handler_shader;
+   struct radv_trap_handler_shader *trap_handler_shader;
    struct radeon_winsys_bo *tma_bo; /* Trap Memory Address */
    uint32_t *tma_ptr;
 

src/amd/vulkan/radv_shader.c

@@ -2061,13 +2061,18 @@ radv_create_gs_copy_shader(struct radv_device *device, struct nir_shader *shader
                          keep_shader_info, keep_statistic_info, binary_out);
 }
 
-struct radv_shader *
+struct radv_trap_handler_shader *
 radv_create_trap_handler_shader(struct radv_device *device)
 {
    struct radv_nir_compiler_options options = {0};
    struct radv_shader *shader = NULL;
    struct radv_shader_binary *binary = NULL;
    struct radv_shader_info info = {0};
+   struct radv_trap_handler_shader *trap;
+
+   trap = malloc(sizeof(struct radv_trap_handler_shader));
+   if (!trap)
+      return NULL;
 
    nir_builder b = radv_meta_init_shader(MESA_SHADER_COMPUTE, "meta_trap_handler");
 
@@ -2078,10 +2083,34 @@ radv_create_trap_handler_shader(struct radv_device *device)
    shader = shader_compile(device, NULL, &b.shader, 1, MESA_SHADER_COMPUTE, &info, &options, false,
                            true, true, false, &binary);
 
+   trap->alloc = radv_alloc_shader_memory(device, shader->code_size, NULL);
+
+   trap->bo = trap->alloc->arena->bo;
+   char *dest_ptr = trap->alloc->arena->ptr + trap->alloc->offset;
+
+   struct radv_shader_binary_legacy *bin = (struct radv_shader_binary_legacy *)binary;
+   memcpy(dest_ptr, bin->data, bin->code_size);
+
    ralloc_free(b.shader);
+   free(shader);
    free(binary);
 
-   return shader;
+   return trap;
+}
+
+uint64_t radv_trap_handler_shader_get_va(const struct radv_trap_handler_shader *trap)
+{
+   return radv_buffer_get_va(trap->alloc->arena->bo) + trap->alloc->offset;
+}
+
+void
+radv_trap_handler_shader_destroy(struct radv_device *device, struct radv_trap_handler_shader *trap)
+{
+   if (!trap)
+      return;
+
+   radv_free_shader_memory(device, trap->alloc);
+   free(trap);
 }
 
 static struct radv_shader_prolog *

src/amd/vulkan/radv_shader.h

@@ -483,6 +483,11 @@ struct radv_shader {
    uint32_t *statistics;
 };
 
+struct radv_trap_handler_shader {
+   struct radeon_winsys_bo *bo;
+   union radv_shader_arena_block *alloc;
+};
+
 struct radv_shader_prolog {
    struct radeon_winsys_bo *bo;
    union radv_shader_arena_block *alloc;
@@ -541,7 +546,10 @@ radv_create_gs_copy_shader(struct radv_device *device, struct nir_shader *nir,
                            bool multiview, bool keep_shader_info, bool keep_statistic_info,
                            bool disable_optimizations);
 
-struct radv_shader *radv_create_trap_handler_shader(struct radv_device *device);
+struct radv_trap_handler_shader *radv_create_trap_handler_shader(struct radv_device *device);
+uint64_t radv_trap_handler_shader_get_va(const struct radv_trap_handler_shader *trap);
+void radv_trap_handler_shader_destroy(struct radv_device *device,
+                                      struct radv_trap_handler_shader *trap);
 
 struct radv_shader_prolog *radv_create_vs_prolog(struct radv_device *device,
                                                  const struct radv_vs_prolog_key *key);

src/amd/vulkan/si_cmd_buffer.c

@@ -141,7 +141,7 @@ si_emit_compute(struct radv_device *device, struct radeon_cmdbuf *cs)
 
       assert(device->physical_device->rad_info.chip_class == GFX8);
 
-      tba_va = radv_shader_get_va(device->trap_handler_shader);
+      tba_va = radv_trap_handler_shader_get_va(device->trap_handler_shader);
       tma_va = radv_buffer_get_va(device->tma_bo);
 
       radeon_set_sh_reg_seq(cs, R_00B838_COMPUTE_TBA_LO, 4);
@@ -553,7 +553,7 @@ si_emit_graphics(struct radv_device *device, struct radeon_cmdbuf *cs)
 
       assert(device->physical_device->rad_info.chip_class == GFX8);
 
-      tba_va = radv_shader_get_va(device->trap_handler_shader);
+      tba_va = radv_trap_handler_shader_get_va(device->trap_handler_shader);
       tma_va = radv_buffer_get_va(device->tma_bo);
 
       uint32_t regs[] = {R_00B000_SPI_SHADER_TBA_LO_PS, R_00B100_SPI_SHADER_TBA_LO_VS,