intel: add devinfo->has_64bit_float_via_math_pipe

Unusual hardware features that require special hanlding usually get a
devinfo field, so do this for MTL's unordered DF types. This will
guarantee that any platform based on MTL (thus inheriting from
MTL_FEATURES) will automatically be handled in these special cases.

v2: s/has_unordered_64bit_float/has_64bit_float_via_math_pipe/ (Curro).

Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20072>

src/intel/compiler/brw_disasm.c

@@ -1827,7 +1827,7 @@ swsb(FILE *file, const struct brw_isa_info *isa, const brw_inst *inst)
    const bool is_unordered =
       opcode == BRW_OPCODE_SEND || opcode == BRW_OPCODE_SENDC ||
       opcode == BRW_OPCODE_MATH ||
-      (intel_device_info_is_mtl(devinfo) &&
+      (devinfo->has_64bit_float_via_math_pipe &&
        inst_has_type(isa, inst, BRW_REGISTER_TYPE_DF));
    const struct tgl_swsb swsb = tgl_swsb_decode(devinfo, is_unordered, x);
    if (swsb.regdist)

src/intel/compiler/brw_fs_lower_regioning.cpp

@@ -155,7 +155,7 @@ namespace {
             return t;
 
       case SHADER_OPCODE_SEL_EXEC:
-         if ((!has_64bit || intel_device_info_is_mtl(devinfo)) &&
+         if ((!has_64bit || devinfo->has_64bit_float_via_math_pipe) &&
              type_sz(t) > 4)
             return BRW_REGISTER_TYPE_UD;
          else

src/intel/compiler/brw_fs_scoreboard.cpp

@@ -75,7 +75,7 @@ namespace {
    {
       if (devinfo->verx10 >= 125) {
          bool has_int_src = false, has_long_src = false;
-         const bool has_long_pipe = !intel_device_info_is_mtl(devinfo);
+         const bool has_long_pipe = !devinfo->has_64bit_float_via_math_pipe;
 
          if (is_send(inst))
             return TGL_PIPE_NONE;
@@ -1016,7 +1016,7 @@ namespace {
       const bool is_ordered = ordered_unit(devinfo, inst, IDX(TGL_PIPE_ALL));
       const bool uses_math_pipe =
          inst->is_math() ||
-         (intel_device_info_is_mtl(devinfo) &&
+         (devinfo->has_64bit_float_via_math_pipe &&
           (get_exec_type(inst) == BRW_REGISTER_TYPE_DF ||
            inst->dst.type == BRW_REGISTER_TYPE_DF));
 

src/intel/compiler/brw_ir_fs.h

@@ -549,7 +549,7 @@ static inline bool
 is_unordered(const intel_device_info *devinfo, const fs_inst *inst)
 {
    return is_send(inst) || inst->is_math() ||
-          (intel_device_info_is_mtl(devinfo) &&
+          (devinfo->has_64bit_float_via_math_pipe &&
            (get_exec_type(inst) == BRW_REGISTER_TYPE_DF ||
             inst->dst.type == BRW_REGISTER_TYPE_DF));
 }

src/intel/dev/intel_device_info.c

@@ -1095,6 +1095,7 @@ static const struct intel_device_info intel_device_info_dg2_g12 = {
    .has_local_mem = false,                                      \
    .apply_hwconfig = true,                                      \
    .has_64bit_float = true,                                     \
+   .has_64bit_float_via_math_pipe = true,                       \
    .has_integer_dword_mul = false,                              \
    .has_coarse_pixel_primitive_and_cb = true,                   \
    .has_mesh_shading = true,                                    \

src/intel/dev/intel_device_info.h

@@ -127,6 +127,7 @@ struct intel_device_info
 
    bool has_pln;
    bool has_64bit_float;
+   bool has_64bit_float_via_math_pipe;
    bool has_64bit_int;
    bool has_integer_dword_mul;
    bool has_compr4;