broadcom/vc5: Implement GFXH-1684 workaround.
Apparently the VPM writes need to be flushed out before we end the shader.
This commit is contained in:
@@ -1362,6 +1362,11 @@ emit_vert_end(struct v3d_compile *c)
|
|||||||
vir_VPM_WRITE(c, vir_uniform_f(c, 0.0),
|
vir_VPM_WRITE(c, vir_uniform_f(c, 0.0),
|
||||||
&vpm_index);
|
&vpm_index);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
/* GFXH-1684: VPM writes need to be complete by the end of the shader.
|
||||||
|
*/
|
||||||
|
if (c->devinfo->ver >= 40 && c->devinfo->ver <= 41)
|
||||||
|
vir_VPMWT(c);
|
||||||
}
|
}
|
||||||
|
|
||||||
void
|
void
|
||||||
|
@@ -310,6 +310,10 @@ calculate_deps(struct schedule_state *state, struct schedule_node *n)
|
|||||||
add_write_dep(state, &state->last_vpm, n);
|
add_write_dep(state, &state->last_vpm, n);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
|
case V3D_QPU_A_VPMWT:
|
||||||
|
add_read_dep(state, state->last_vpm, n);
|
||||||
|
break;
|
||||||
|
|
||||||
case V3D_QPU_A_MSF:
|
case V3D_QPU_A_MSF:
|
||||||
add_read_dep(state, state->last_tlb, n);
|
add_read_dep(state, state->last_tlb, n);
|
||||||
break;
|
break;
|
||||||
|
@@ -744,6 +744,14 @@ vir_##name##_dest(struct v3d_compile *c, struct qreg dest, \
|
|||||||
return vir_emit_nondef(c, vir_inst(op, dest, a, b)); \
|
return vir_emit_nondef(c, vir_inst(op, dest, a, b)); \
|
||||||
}
|
}
|
||||||
|
|
||||||
|
#define VIR_NODST_0(name, vir_inst, op) \
|
||||||
|
static inline struct qinst * \
|
||||||
|
vir_##name(struct v3d_compile *c) \
|
||||||
|
{ \
|
||||||
|
return vir_emit_nondef(c, vir_inst(op, c->undef, \
|
||||||
|
c->undef, c->undef)); \
|
||||||
|
}
|
||||||
|
|
||||||
#define VIR_NODST_1(name, vir_inst, op) \
|
#define VIR_NODST_1(name, vir_inst, op) \
|
||||||
static inline struct qinst * \
|
static inline struct qinst * \
|
||||||
vir_##name(struct v3d_compile *c, struct qreg a) \
|
vir_##name(struct v3d_compile *c, struct qreg a) \
|
||||||
@@ -770,6 +778,7 @@ vir_##name(struct v3d_compile *c, struct qreg a, struct qreg b) \
|
|||||||
#define VIR_M_NODST_2(name) VIR_NODST_2(name, vir_mul_inst, V3D_QPU_M_##name)
|
#define VIR_M_NODST_2(name) VIR_NODST_2(name, vir_mul_inst, V3D_QPU_M_##name)
|
||||||
#define VIR_A_NODST_1(name) VIR_NODST_1(name, vir_add_inst, V3D_QPU_A_##name)
|
#define VIR_A_NODST_1(name) VIR_NODST_1(name, vir_add_inst, V3D_QPU_A_##name)
|
||||||
#define VIR_M_NODST_1(name) VIR_NODST_1(name, vir_mul_inst, V3D_QPU_M_##name)
|
#define VIR_M_NODST_1(name) VIR_NODST_1(name, vir_mul_inst, V3D_QPU_M_##name)
|
||||||
|
#define VIR_A_NODST_0(name) VIR_NODST_0(name, vir_add_inst, V3D_QPU_A_##name)
|
||||||
|
|
||||||
VIR_A_ALU2(FADD)
|
VIR_A_ALU2(FADD)
|
||||||
VIR_A_ALU2(VFPACK)
|
VIR_A_ALU2(VFPACK)
|
||||||
@@ -812,6 +821,7 @@ VIR_A_ALU0(YCD)
|
|||||||
VIR_A_ALU0(MSF)
|
VIR_A_ALU0(MSF)
|
||||||
VIR_A_ALU0(REVF)
|
VIR_A_ALU0(REVF)
|
||||||
VIR_A_NODST_1(VPMSETUP)
|
VIR_A_NODST_1(VPMSETUP)
|
||||||
|
VIR_A_NODST_0(VPMWT)
|
||||||
VIR_A_ALU2(FCMP)
|
VIR_A_ALU2(FCMP)
|
||||||
VIR_A_ALU2(VFMAX)
|
VIR_A_ALU2(VFMAX)
|
||||||
|
|
||||||
|
@@ -95,6 +95,7 @@ vir_has_side_effects(struct v3d_compile *c, struct qinst *inst)
|
|||||||
case V3D_QPU_A_STVPMV:
|
case V3D_QPU_A_STVPMV:
|
||||||
case V3D_QPU_A_STVPMD:
|
case V3D_QPU_A_STVPMD:
|
||||||
case V3D_QPU_A_STVPMP:
|
case V3D_QPU_A_STVPMP:
|
||||||
|
case V3D_QPU_A_VPMWT:
|
||||||
return true;
|
return true;
|
||||||
default:
|
default:
|
||||||
break;
|
break;
|
||||||
|
Reference in New Issue
Block a user