OpenHarmony/third_party_mesa3d
2
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

i965: Move SF compilation to the compiler

Browse Source 
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
This commit is contained in:
Jason Ekstrand
2017-03-18 11:23:39 -07:00
parent c30587643e
commit 9fb8a8775b
10 changed files with 209 additions and 246 deletions
Download Patch File Download Diff File Expand all files Collapse all files

1
src/intel/Makefile.sources
View File

@@ -23,6 +23,7 @@ DECODER_FILES = \
COMPILER_FILES = \
compiler/brw_cfg.cpp \
compiler/brw_cfg.h \
compiler/brw_compile_sf.c \
compiler/brw_compiler.c \
compiler/brw_compiler.h \
compiler/brw_dead_control_flow.cpp \

189
src/mesa/drivers/dri/i965/brw_sf_emit.c → src/intel/compiler/brw_compile_sf.c
View File

@@ -1,45 +1,73 @@
/*
Copyright (C) Intel Corp. 2006. All Rights Reserved.
Intel funded Tungsten Graphics to
develop this 3D driver.
Permission is hereby granted, free of charge, to any person obtaining
a copy of this software and associated documentation files (the
"Software"), to deal in the Software without restriction, including
without limitation the rights to use, copy, modify, merge, publish,
distribute, sublicense, and/or sell copies of the Software, and to
permit persons to whom the Software is furnished to do so, subject to
the following conditions:
The above copyright notice and this permission notice (including the
next paragraph) shall be included in all copies or substantial
portions of the Software.
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
**********************************************************************/
/*
* Authors:
* Keith Whitwell <keithw@vmware.com>
* Copyright © 2006 - 2017 Intel Corporation
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice (including the next
* paragraph) shall be included in all copies or substantial portions of the
* Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
* IN THE SOFTWARE.
*/
#include "brw_compiler.h"
#include "brw_eu.h"
#include "main/macros.h"
#include "main/enums.h"
#include "common/gen_debug.h"
#include "intel_batchbuffer.h"
struct brw_sf_compile {
struct brw_codegen func;
struct brw_sf_prog_key key;
struct brw_sf_prog_data prog_data;
#include "brw_defines.h"
#include "brw_context.h"
#include "brw_util.h"
#include "brw_sf.h"
struct brw_reg pv;
struct brw_reg det;
struct brw_reg dx0;
struct brw_reg dx2;
struct brw_reg dy0;
struct brw_reg dy2;
/* z and 1/w passed in seperately:
*/
struct brw_reg z[3];
struct brw_reg inv_w[3];
/* The vertices:
*/
struct brw_reg vert[3];
/* Temporaries, allocated after last vertex reg.
*/
struct brw_reg inv_det;
struct brw_reg a1_sub_a0;
struct brw_reg a2_sub_a0;
struct brw_reg tmp;
struct brw_reg m1Cx;
struct brw_reg m2Cy;
struct brw_reg m3C0;
GLuint nr_verts;
GLuint nr_attr_regs;
GLuint nr_setup_regs;
int urb_entry_read_offset;
/** The last known value of the f0.0 flag register. */
unsigned flag_value;
struct brw_vue_map vue_map;
};
/**
* Determine the vue slot corresponding to the given half of the given register.
@@ -119,7 +147,7 @@ static void do_twoside_color( struct brw_sf_compile *c )
/* Already done in clip program:
*/
if (c->key.primitive == SF_UNFILLED_TRIS)
if (c->key.primitive == BRW_SF_PRIM_UNFILLED_TRIS)
return;
/* If the vertex shader provides backface color, do the selection. The VS
@@ -195,7 +223,7 @@ static void do_flatshade_triangle( struct brw_sf_compile *c )
/* Already done in clip program:
*/
if (c->key.primitive == SF_UNFILLED_TRIS)
if (c->key.primitive == BRW_SF_PRIM_UNFILLED_TRIS)
return;
if (p->devinfo->gen == 5)
@@ -227,7 +255,7 @@ static void do_flatshade_line( struct brw_sf_compile *c )
/* Already done in clip program:
*/
if (c->key.primitive == SF_UNFILLED_TRIS)
if (c->key.primitive == BRW_SF_PRIM_UNFILLED_TRIS)
return;
if (p->devinfo->gen == 5)
@@ -410,7 +438,7 @@ set_predicate_control_flag_value(struct brw_codegen *p,
}
}
void brw_emit_tri_setup(struct brw_sf_compile *c, bool allocate)
static void brw_emit_tri_setup(struct brw_sf_compile *c, bool allocate)
{
struct brw_codegen *p = &c->func;
GLuint i;
@@ -499,7 +527,7 @@ void brw_emit_tri_setup(struct brw_sf_compile *c, bool allocate)
void brw_emit_line_setup(struct brw_sf_compile *c, bool allocate)
static void brw_emit_line_setup(struct brw_sf_compile *c, bool allocate)
{
struct brw_codegen *p = &c->func;
GLuint i;
@@ -571,7 +599,7 @@ void brw_emit_line_setup(struct brw_sf_compile *c, bool allocate)
brw_set_default_predicate_control(p, BRW_PREDICATE_NONE);
}
void brw_emit_point_sprite_setup(struct brw_sf_compile *c, bool allocate)
static void brw_emit_point_sprite_setup(struct brw_sf_compile *c, bool allocate)
{
struct brw_codegen *p = &c->func;
GLuint i;
@@ -663,7 +691,7 @@ void brw_emit_point_sprite_setup(struct brw_sf_compile *c, bool allocate)
/* Points setup - several simplifications as all attributes are
* constant across the face of the point (point sprites excluded!)
*/
void brw_emit_point_setup(struct brw_sf_compile *c, bool allocate)
static void brw_emit_point_setup(struct brw_sf_compile *c, bool allocate)
{
struct brw_codegen *p = &c->func;
GLuint i;
@@ -722,7 +750,7 @@ void brw_emit_point_setup(struct brw_sf_compile *c, bool allocate)
brw_set_default_predicate_control(p, BRW_PREDICATE_NONE);
}
void brw_emit_anyprim_setup( struct brw_sf_compile *c )
static void brw_emit_anyprim_setup( struct brw_sf_compile *c )
{
struct brw_codegen *p = &c->func;
struct brw_reg payload_prim = brw_uw1_reg(BRW_GENERAL_REGISTER_FILE, 1, 0);
@@ -771,6 +799,81 @@ void brw_emit_anyprim_setup( struct brw_sf_compile *c )
brw_emit_point_setup( c, false );
}
const unsigned *
brw_compile_sf(const struct brw_compiler *compiler,
void *mem_ctx,
const struct brw_sf_prog_key *key,
struct brw_sf_prog_data *prog_data,
struct brw_vue_map *vue_map,
unsigned *final_assembly_size)
{
struct brw_sf_compile c;
memset(&c, 0, sizeof(c));
/* Begin the compilation:
*/
brw_init_codegen(compiler->devinfo, &c.func, mem_ctx);
c.key = *key;
c.vue_map = *vue_map;
if (c.key.do_point_coord) {
/*
* gl_PointCoord is a FS instead of VS builtin variable, thus it's
* not included in c.vue_map generated in VS stage. Here we add
* it manually to let SF shader generate the needed interpolation
* coefficient for FS shader.
*/
c.vue_map.varying_to_slot[BRW_VARYING_SLOT_PNTC] = c.vue_map.num_slots;
c.vue_map.slot_to_varying[c.vue_map.num_slots++] = BRW_VARYING_SLOT_PNTC;
}
c.urb_entry_read_offset = BRW_SF_URB_ENTRY_READ_OFFSET;
c.nr_attr_regs = (c.vue_map.num_slots + 1)/2 - c.urb_entry_read_offset;
c.nr_setup_regs = c.nr_attr_regs;
c.prog_data.urb_read_length = c.nr_attr_regs;
c.prog_data.urb_entry_size = c.nr_setup_regs * 2;
/* Which primitive? Or all three?
*/
switch (key->primitive) {
case BRW_SF_PRIM_TRIANGLES:
c.nr_verts = 3;
brw_emit_tri_setup( &c, true );
break;
case BRW_SF_PRIM_LINES:
c.nr_verts = 2;
brw_emit_line_setup( &c, true );
break;
case BRW_SF_PRIM_POINTS:
c.nr_verts = 1;
if (key->do_point_sprite)
brw_emit_point_sprite_setup( &c, true );
else
brw_emit_point_setup( &c, true );
break;
case BRW_SF_PRIM_UNFILLED_TRIS:
c.nr_verts = 3;
brw_emit_anyprim_setup( &c );
break;
default:
unreachable("not reached");
}
/* FINISHME: SF programs use calculated jumps (i.e., JMPI with a register
* source). Compacting would be difficult.
*/
/* brw_compact_instructions(&c.func, 0, 0, NULL); */
*prog_data = c.prog_data;
const unsigned *program = brw_get_program(&c.func, final_assembly_size);
if (unlikely(INTEL_DEBUG & DEBUG_SF)) {
fprintf(stderr, "sf:\n");
brw_disassemble(compiler->devinfo,
program, 0, *final_assembly_size, stderr);
fprintf(stderr, "\n");
}
return program;
}

50
src/intel/compiler/brw_compiler.h
View File

@@ -260,6 +260,27 @@ struct brw_gs_prog_key
struct brw_sampler_prog_key_data tex;
};
enum brw_sf_primitive {
BRW_SF_PRIM_POINTS = 0,
BRW_SF_PRIM_LINES = 1,
BRW_SF_PRIM_TRIANGLES = 2,
BRW_SF_PRIM_UNFILLED_TRIS = 3,
};
struct brw_sf_prog_key {
uint64_t attrs;
bool contains_flat_varying;
unsigned char interp_mode[65]; /* BRW_VARYING_SLOT_COUNT */
uint8_t point_sprite_coord_replace;
enum brw_sf_primitive primitive:2;
bool do_twoside_color:1;
bool frontface_ccw:1;
bool do_point_sprite:1;
bool do_point_coord:1;
bool sprite_origin_lower_left:1;
bool userclip_active:1;
};
/* A big lookup table is used to figure out which and how many
* additional regs will inserted before the main payload in the WM
* program execution. These mainly relate to depth and stencil
@@ -871,6 +892,19 @@ struct brw_gs_prog_data
unsigned char transform_feedback_swizzles[64 /* BRW_MAX_SOL_BINDINGS */];
};
struct brw_sf_prog_data {
uint32_t urb_read_length;
uint32_t total_grf;
/* Each vertex may have upto 12 attributes, 4 components each,
* except WPOS which requires only 2. (11*4 + 2) == 44 ==> 11
* rows.
*
* Actually we use 4 for each, so call it 12 rows.
*/
unsigned urb_entry_size;
};
#define DEFINE_PROG_DATA_DOWNCAST(stage) \
static inline struct brw_##stage##_prog_data * \
brw_##stage##_prog_data(struct brw_stage_prog_data *prog_data) \
@@ -960,6 +994,22 @@ brw_compile_gs(const struct brw_compiler *compiler, void *log_data,
unsigned *final_assembly_size,
char **error_str);
/**
* Compile a strips and fans shader.
*
* This is a fixed-function shader determined entirely by the shader key and
* a VUE map.
*
* Returns the final assembly and the program's size.
*/
const unsigned *
brw_compile_sf(const struct brw_compiler *compiler,
void *mem_ctx,
const struct brw_sf_prog_key *key,
struct brw_sf_prog_data *prog_data,
struct brw_vue_map *vue_map,
unsigned *final_assembly_size);
/**
* Compile a fragment shader.
*

2
src/intel/compiler/brw_eu_defines.h
View File

@@ -77,6 +77,8 @@
#define URB_WRITE_PRIM_START 0x2
#define URB_WRITE_PRIM_TYPE_SHIFT 2
#define BRW_SPRITE_POINT_ENABLE 16
# define GEN7_GS_CONTROL_DATA_FORMAT_GSCTL_CUT 0
# define GEN7_GS_CONTROL_DATA_FORMAT_GSCTL_SID 1

2
src/mesa/drivers/dri/i965/Makefile.sources
View File

@@ -51,8 +51,6 @@ i965_FILES = \
brw_reset.c \
brw_sampler_state.c \
brw_sf.c \
brw_sf_emit.c \
brw_sf.h \
brw_sf_state.c \
brw_state_batch.c \
brw_state.h \

14
src/mesa/drivers/dri/i965/brw_context.h
View File

@@ -325,20 +325,6 @@ struct brw_program {
};
struct brw_sf_prog_data {
GLuint urb_read_length;
GLuint total_grf;
/* Each vertex may have upto 12 attributes, 4 components each,
* except WPOS which requires only 2. (11*4 + 2) == 44 ==> 11
* rows.
*
* Actually we use 4 for each, so call it 12 rows.
*/
GLuint urb_entry_size;
};
struct brw_clip_prog_data {
GLuint curb_read_length; /* user planes? */
GLuint clip_mode;

2
src/mesa/drivers/dri/i965/brw_defines.h
View File

@@ -153,8 +153,6 @@
#define BRW_FRONTWINDING_CW 0
#define BRW_FRONTWINDING_CCW 1
#define BRW_SPRITE_POINT_ENABLE 16
#define BRW_CUT_INDEX_ENABLE (1 << 10)
#define BRW_INDEX_BYTE 0

87
src/mesa/drivers/dri/i965/brw_sf.c
View File

@@ -40,91 +40,28 @@
#include "brw_defines.h"
#include "brw_context.h"
#include "brw_util.h"
#include "brw_sf.h"
#include "brw_state.h"
#include "compiler/brw_eu.h"
#include "util/ralloc.h"
static void compile_sf_prog( struct brw_context *brw,
struct brw_sf_prog_key *key )
{
struct brw_sf_compile c;
const GLuint *program;
const unsigned *program;
void *mem_ctx;
GLuint program_size;
memset(&c, 0, sizeof(c));
unsigned program_size;
mem_ctx = ralloc_context(NULL);
/* Begin the compilation:
*/
brw_init_codegen(&brw->screen->devinfo, &c.func, mem_ctx);
c.key = *key;
c.vue_map = brw->vue_map_geom_out;
if (c.key.do_point_coord) {
/*
* gl_PointCoord is a FS instead of VS builtin variable, thus it's
* not included in c.vue_map generated in VS stage. Here we add
* it manually to let SF shader generate the needed interpolation
* coefficient for FS shader.
*/
c.vue_map.varying_to_slot[BRW_VARYING_SLOT_PNTC] = c.vue_map.num_slots;
c.vue_map.slot_to_varying[c.vue_map.num_slots++] = BRW_VARYING_SLOT_PNTC;
}
c.urb_entry_read_offset = BRW_SF_URB_ENTRY_READ_OFFSET;
c.nr_attr_regs = (c.vue_map.num_slots + 1)/2 - c.urb_entry_read_offset;
c.nr_setup_regs = c.nr_attr_regs;
c.prog_data.urb_read_length = c.nr_attr_regs;
c.prog_data.urb_entry_size = c.nr_setup_regs * 2;
/* Which primitive? Or all three?
*/
switch (key->primitive) {
case SF_TRIANGLES:
c.nr_verts = 3;
brw_emit_tri_setup( &c, true );
break;
case SF_LINES:
c.nr_verts = 2;
brw_emit_line_setup( &c, true );
break;
case SF_POINTS:
c.nr_verts = 1;
if (key->do_point_sprite)
brw_emit_point_sprite_setup( &c, true );
else
brw_emit_point_setup( &c, true );
break;
case SF_UNFILLED_TRIS:
c.nr_verts = 3;
brw_emit_anyprim_setup( &c );
break;
default:
unreachable("not reached");
}
/* FINISHME: SF programs use calculated jumps (i.e., JMPI with a register
* source). Compacting would be difficult.
*/
/* brw_compact_instructions(&c.func, 0, 0, NULL); */
/* get the program
*/
program = brw_get_program(&c.func, &program_size);
if (unlikely(INTEL_DEBUG & DEBUG_SF)) {
fprintf(stderr, "sf:\n");
brw_disassemble(&brw->screen->devinfo,
c.func.store, 0, program_size, stderr);
fprintf(stderr, "\n");
}
struct brw_sf_prog_data prog_data;
program = brw_compile_sf(brw->screen->compiler, mem_ctx, key, &prog_data,
&brw->vue_map_geom_out, &program_size);
brw_upload_cache(&brw->cache, BRW_CACHE_SF_PROG,
&c.key, sizeof(c.key),
key, sizeof(*key),
program, program_size,
&c.prog_data, sizeof(c.prog_data),
&prog_data, sizeof(prog_data),
&brw->sf.prog_offset, &brw->sf.prog_data);
ralloc_free(mem_ctx);
}
@@ -170,15 +107,15 @@ brw_upload_sf_prog(struct brw_context *brw)
* program.
*/
if (key.attrs & BITFIELD64_BIT(VARYING_SLOT_EDGE))
key.primitive = SF_UNFILLED_TRIS;
key.primitive = BRW_SF_PRIM_UNFILLED_TRIS;
else
key.primitive = SF_TRIANGLES;
key.primitive = BRW_SF_PRIM_TRIANGLES;
break;
case GL_LINES:
key.primitive = SF_LINES;
key.primitive = BRW_SF_PRIM_LINES;
break;
case GL_POINTS:
key.primitive = SF_POINTS;
key.primitive = BRW_SF_PRIM_POINTS;
break;
}

111
src/mesa/drivers/dri/i965/brw_sf.h
View File

@@ -1,111 +0,0 @@
/*
Copyright (C) Intel Corp. 2006. All Rights Reserved.
Intel funded Tungsten Graphics to
develop this 3D driver.
Permission is hereby granted, free of charge, to any person obtaining
a copy of this software and associated documentation files (the
"Software"), to deal in the Software without restriction, including
without limitation the rights to use, copy, modify, merge, publish,
distribute, sublicense, and/or sell copies of the Software, and to
permit persons to whom the Software is furnished to do so, subject to
the following conditions:
The above copyright notice and this permission notice (including the
next paragraph) shall be included in all copies or substantial
portions of the Software.
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
**********************************************************************/
/*
* Authors:
* Keith Whitwell <keithw@vmware.com>
*/
#ifndef BRW_SF_H
#define BRW_SF_H
#include "program/program.h"
#include "brw_context.h"
#include "compiler/brw_eu.h"
#define SF_POINTS 0
#define SF_LINES 1
#define SF_TRIANGLES 2
#define SF_UNFILLED_TRIS 3
struct brw_sf_prog_key {
GLbitfield64 attrs;
bool contains_flat_varying;
unsigned char interp_mode[65]; /* BRW_VARYING_SLOT_COUNT */
uint8_t point_sprite_coord_replace;
GLuint primitive:2;
GLuint do_twoside_color:1;
GLuint frontface_ccw:1;
GLuint do_point_sprite:1;
GLuint do_point_coord:1;
GLuint sprite_origin_lower_left:1;
GLuint userclip_active:1;
};
struct brw_sf_compile {
struct brw_codegen func;
struct brw_sf_prog_key key;
struct brw_sf_prog_data prog_data;
struct brw_reg pv;
struct brw_reg det;
struct brw_reg dx0;
struct brw_reg dx2;
struct brw_reg dy0;
struct brw_reg dy2;
/* z and 1/w passed in seperately:
*/
struct brw_reg z[3];
struct brw_reg inv_w[3];
/* The vertices:
*/
struct brw_reg vert[3];
/* Temporaries, allocated after last vertex reg.
*/
struct brw_reg inv_det;
struct brw_reg a1_sub_a0;
struct brw_reg a2_sub_a0;
struct brw_reg tmp;
struct brw_reg m1Cx;
struct brw_reg m2Cy;
struct brw_reg m3C0;
GLuint nr_verts;
GLuint nr_attr_regs;
GLuint nr_setup_regs;
int urb_entry_read_offset;
/** The last known value of the f0.0 flag register. */
unsigned flag_value;
struct brw_vue_map vue_map;
};
void brw_emit_tri_setup( struct brw_sf_compile *c, bool allocate );
void brw_emit_line_setup( struct brw_sf_compile *c, bool allocate );
void brw_emit_point_setup( struct brw_sf_compile *c, bool allocate );
void brw_emit_point_sprite_setup( struct brw_sf_compile *c, bool allocate );
void brw_emit_anyprim_setup( struct brw_sf_compile *c );
#endif

1
src/mesa/drivers/dri/i965/brw_sf_state.c
View File

@@ -39,7 +39,6 @@
#include "brw_context.h"
#include "brw_state.h"
#include "brw_defines.h"
#include "brw_sf.h"
static void upload_sf_vp(struct brw_context *brw)
{