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intel: Drop program size pointer from vec4/fs assembly getters.

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These days, we're just passing a pointer to a prog_data field, which
we already have access to.  We can just use it directly.

(In the past, it was a pointer to a separate value.)

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
This commit is contained in:
Kenneth Graunke
2018-02-26 16:34:55 -08:00
parent b04cf529f2
commit 9fa95359df
9 changed files with 17 additions and 25 deletions
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4
src/intel/compiler/brw_fs.cpp
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@@ -6958,7 +6958,7 @@ brw_compile_fs(const struct brw_compiler *compiler, void *log_data,
prog_data->reg_blocks_0 = brw_register_blocks(simd16_grf_used);
}
return g.get_assembly(&prog_data->base.program_size);
return g.get_assembly();
}
fs_reg *
@@ -7181,7 +7181,7 @@ brw_compile_cs(const struct brw_compiler *compiler, void *log_data,
g.generate_code(cfg, prog_data->simd_size);
ret = g.get_assembly(&prog_data->base.program_size);
ret = g.get_assembly();
}
delete v8;

2
src/intel/compiler/brw_fs.h
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@@ -395,7 +395,7 @@ public:
void enable_debug(const char *shader_name);
int generate_code(const cfg_t *cfg, int dispatch_width);
const unsigned *get_assembly(unsigned int *assembly_size);
const unsigned *get_assembly();
private:
void fire_fb_write(fs_inst *inst,

4
src/intel/compiler/brw_fs_generator.cpp
View File

@@ -2318,7 +2318,7 @@ fs_generator::generate_code(const cfg_t *cfg, int dispatch_width)
}
const unsigned *
fs_generator::get_assembly(unsigned int *assembly_size)
fs_generator::get_assembly()
{
return brw_get_program(p, assembly_size);
return brw_get_program(p, &prog_data->program_size);
}

5
src/intel/compiler/brw_shader.cpp
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@@ -1270,7 +1270,7 @@ brw_compile_tes(const struct brw_compiler *compiler,
g.generate_code(v.cfg, 8);
assembly = g.get_assembly(&prog_data->base.base.program_size);
assembly = g.get_assembly();
} else {
brw::vec4_tes_visitor v(compiler, log_data, key, prog_data,
nir, mem_ctx, shader_time_index);
@@ -1284,8 +1284,7 @@ brw_compile_tes(const struct brw_compiler *compiler,
v.dump_instructions();
assembly = brw_vec4_generate_assembly(compiler, log_data, mem_ctx, nir,
&prog_data->base, v.cfg,
&prog_data->base.base.program_size);
&prog_data->base, v.cfg);
}
return assembly;

5
src/intel/compiler/brw_vec4.cpp
View File

@@ -2883,7 +2883,7 @@ brw_compile_vs(const struct brw_compiler *compiler, void *log_data,
g.enable_debug(debug_name);
}
g.generate_code(v.cfg, 8);
assembly = g.get_assembly(&prog_data->base.base.program_size);
assembly = g.get_assembly();
}
if (!assembly) {
@@ -2899,8 +2899,7 @@ brw_compile_vs(const struct brw_compiler *compiler, void *log_data,
}
assembly = brw_vec4_generate_assembly(compiler, log_data, mem_ctx,
shader, &prog_data->base, v.cfg,
&prog_data->base.base.program_size);
shader, &prog_data->base, v.cfg);
}
return assembly;

3
src/intel/compiler/brw_vec4.h
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@@ -45,8 +45,7 @@ brw_vec4_generate_assembly(const struct brw_compiler *compiler,
void *mem_ctx,
const nir_shader *nir,
struct brw_vue_prog_data *prog_data,
const struct cfg_t *cfg,
unsigned *out_assembly_size);
const struct cfg_t *cfg);
#ifdef __cplusplus
} /* extern "C" */

5
src/intel/compiler/brw_vec4_generator.cpp
View File

@@ -2222,8 +2222,7 @@ brw_vec4_generate_assembly(const struct brw_compiler *compiler,
void *mem_ctx,
const nir_shader *nir,
struct brw_vue_prog_data *prog_data,
const struct cfg_t *cfg,
unsigned *out_assembly_size)
const struct cfg_t *cfg)
{
struct brw_codegen *p = rzalloc(mem_ctx, struct brw_codegen);
brw_init_codegen(compiler->devinfo, p, mem_ctx);
@@ -2231,5 +2230,5 @@ brw_vec4_generate_assembly(const struct brw_compiler *compiler,
generate_code(p, compiler, log_data, nir, prog_data, cfg);
return brw_get_program(p, out_assembly_size);
return brw_get_program(p, &prog_data->base.program_size);
}

9
src/intel/compiler/brw_vec4_gs_visitor.cpp
View File

@@ -867,7 +867,7 @@ brw_compile_gs(const struct brw_compiler *compiler, void *log_data,
g.enable_debug(name);
}
g.generate_code(v.cfg, 8);
return g.get_assembly(&prog_data->base.base.program_size);
return g.get_assembly();
}
}
@@ -897,9 +897,7 @@ brw_compile_gs(const struct brw_compiler *compiler, void *log_data,
/* Success! Backup is not needed */
ralloc_free(param);
return brw_vec4_generate_assembly(compiler, log_data, mem_ctx,
shader, &prog_data->base, v.cfg,
&prog_data->base.base.
program_size);
shader, &prog_data->base, v.cfg);
} else {
/* These variables could be modified by the execution of the GS
* visitor if it packed the uniforms in the push constant buffer.
@@ -962,8 +960,7 @@ brw_compile_gs(const struct brw_compiler *compiler, void *log_data,
*error_str = ralloc_strdup(mem_ctx, gs->fail_msg);
} else {
ret = brw_vec4_generate_assembly(compiler, log_data, mem_ctx, shader,
&prog_data->base, gs->cfg,
&prog_data->base.base.program_size);
&prog_data->base, gs->cfg);
}
delete gs;

5
src/intel/compiler/brw_vec4_tcs.cpp
View File

@@ -487,7 +487,7 @@ brw_compile_tcs(const struct brw_compiler *compiler,
g.generate_code(v.cfg, 8);
assembly = g.get_assembly(&prog_data->base.base.program_size);
assembly = g.get_assembly();
} else {
vec4_tcs_visitor v(compiler, log_data, key, prog_data,
nir, mem_ctx, shader_time_index, &input_vue_map);
@@ -502,8 +502,7 @@ brw_compile_tcs(const struct brw_compiler *compiler,
assembly = brw_vec4_generate_assembly(compiler, log_data, mem_ctx, nir,
&prog_data->base, v.cfg,
&prog_data->base.base.program_size);
&prog_data->base, v.cfg);
}
return assembly;