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nir,amd: add and use nir_intrinsic_load_esgs_vertex_stride_amd

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This will emulate VGT_ESGS_RING_ITEMSIZE, which does the multiplication
for us. It's beneficial to stop setting VGT_ESGS_RING_ITEMSIZE to reduce
context rolls, and also the register will be removed in the future.

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21525>
This commit is contained in:
Marek Olšák
2023-02-20 00:50:24 -05:00
committed by Marge Bot
parent 5e837f9594
commit 9f1e6d8f70
5 changed files with 13 additions and 0 deletions
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1
src/compiler/nir/nir_divergence_analysis.c
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@@ -196,6 +196,7 @@ visit_intrinsic(nir_shader *shader, nir_intrinsic_instr *instr)
case nir_intrinsic_load_mesh_inline_data_intel:
case nir_intrinsic_load_ray_num_dss_rt_stacks_intel:
case nir_intrinsic_load_lshs_vertex_stride_amd:
case nir_intrinsic_load_esgs_vertex_stride_amd:
case nir_intrinsic_load_hs_out_patch_data_offset_amd:
case nir_intrinsic_load_clip_half_line_width_amd:
case nir_intrinsic_load_num_vertices_per_primitive_amd:

3
src/compiler/nir/nir_intrinsics.py
View File

@@ -1509,6 +1509,9 @@ intrinsic("store_shared2_amd", [2, 1], indices=[OFFSET0, OFFSET1, ST64])
# Vertex stride in LS-HS buffer
system_value("lshs_vertex_stride_amd", 1)
# Vertex stride in ES-GS buffer
system_value("esgs_vertex_stride_amd", 1)
# Per patch data offset in HS VRAM output buffer
system_value("hs_out_patch_data_offset_amd", 1)