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radv: enable lowering of GS intrinsics for the LLVM backend

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This replaces emit_vertex with:
   if (vertex_count < max_vertices) {
      emit_vertex_with_counter vertex_count ...
      vertex_count += 1
   }

Which is exactly what NIR->LLVM was doing but at NIR level. This
pass is already called by ACO.

pipeline-db changes on GFX10:
Totals from affected shaders:
SGPRS: 1952 -> 1912 (-2.05 %)
VGPRS: 2112 -> 2044 (-3.22 %)
Code Size: 189368 -> 185620 (-1.98 %) bytes
Max Waves: 494 -> 491 (-0.61 %)

No pipeline-db changes on other generations.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4182>
This commit is contained in:
Samuel Pitoiset
2020-03-13 11:23:07 +01:00
parent cd99ea7318
commit 9f005f1f85
4 changed files with 29 additions and 50 deletions
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3
src/amd/vulkan/radv_shader.c
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@@ -453,8 +453,7 @@ radv_shader_compile_to_nir(struct radv_device *device,
nir_shader_gather_info(nir, nir_shader_get_entrypoint(nir));
if (nir->info.stage == MESA_SHADER_GEOMETRY &&
device->physical_device->use_aco)
if (nir->info.stage == MESA_SHADER_GEOMETRY)
nir_lower_gs_intrinsics(nir, true);
static const nir_lower_tex_options tex_options = {