turnip: fix SP_HS_UNKNOWN_A831 value for A650
Signed-off-by: Jonathan Marek <jonathan@marek.ca> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5765>
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e646e77e18
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9ece61269d
@@ -451,7 +451,7 @@ r3d_common(struct tu_cmd_buffer *cmd, struct tu_cs *cs, bool blit, uint32_t num_
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tu_cs_emit_regs(cs, A6XX_PC_PRIMITIVE_CNTL_0());
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tu_cs_emit_regs(cs, A6XX_VFD_CONTROL_0());
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tu6_emit_vpc(cs, &vs, NULL, NULL, NULL, &fs, 0);
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tu6_emit_vpc(cs, &vs, NULL, NULL, NULL, &fs, 0, false);
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/* REPL_MODE for varying with RECTLIST (2 vertices only) */
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tu_cs_emit_regs(cs, A6XX_VPC_VARYING_INTERP_MODE(0, 0));
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@@ -741,7 +741,8 @@ tu6_emit_vpc(struct tu_cs *cs,
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const struct ir3_shader_variant *ds,
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const struct ir3_shader_variant *gs,
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const struct ir3_shader_variant *fs,
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uint32_t patch_control_points)
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uint32_t patch_control_points,
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bool vshs_workgroup)
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{
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/* note: doesn't compile as static because of the array regs.. */
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const struct reg_config {
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@@ -913,6 +914,8 @@ tu6_emit_vpc(struct tu_cs *cs,
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if (hs) {
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shader_info *hs_info = &hs->shader->nir->info;
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uint32_t unknown_a831 = vs->output_size;
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tu_cs_emit_pkt4(cs, REG_A6XX_PC_TESS_NUM_VERTEX, 1);
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tu_cs_emit(cs, hs_info->tess.tcs_vertices_out);
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@@ -920,8 +923,21 @@ tu6_emit_vpc(struct tu_cs *cs,
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tu_cs_emit_pkt4(cs, REG_A6XX_PC_HS_INPUT_SIZE, 1);
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tu_cs_emit(cs, patch_control_points * vs->output_size / 4);
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/* for A650 this value seems to be local memory size per wave */
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if (vshs_workgroup) {
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const uint32_t wavesize = 64;
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/* note: if HS is really just the VS extended, then this
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* should be by MAX2(patch_control_points, hs_info->tess.tcs_vertices_out)
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* however that doesn't match the blob, and fails some dEQP tests.
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*/
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uint32_t prims_per_wave = wavesize / hs_info->tess.tcs_vertices_out;
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uint32_t total_size = vs->output_size * patch_control_points * prims_per_wave;
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unknown_a831 = DIV_ROUND_UP(total_size, wavesize);
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}
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tu_cs_emit_pkt4(cs, REG_A6XX_SP_HS_UNKNOWN_A831, 1);
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tu_cs_emit(cs, vs->output_size);
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tu_cs_emit(cs, unknown_a831);
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/* In SPIR-V generated from GLSL, the tessellation primitive params are
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* are specified in the tess eval shader, but in SPIR-V generated from
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* HLSL, they are specified in the tess control shader. */
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@@ -1405,7 +1421,8 @@ tu6_emit_program(struct tu_cs *cs,
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tu_cs_emit_pkt4(cs, REG_A6XX_SP_HS_UNKNOWN_A831, 1);
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tu_cs_emit(cs, 0);
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tu6_emit_vpc(cs, vs, hs, ds, gs, fs, cps_per_patch);
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tu6_emit_vpc(cs, vs, hs, ds, gs, fs, cps_per_patch,
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builder->device->physical_device->gpu_id == 650);
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tu6_emit_vpc_varying_modes(cs, fs);
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if (fs) {
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@@ -1189,7 +1189,8 @@ tu6_emit_vpc(struct tu_cs *cs,
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const struct ir3_shader_variant *ds,
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const struct ir3_shader_variant *gs,
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const struct ir3_shader_variant *fs,
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uint32_t patch_control_points);
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uint32_t patch_control_points,
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bool vshs_workgroup);
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void
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tu6_emit_fs_inputs(struct tu_cs *cs, const struct ir3_shader_variant *fs);
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