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intel/fs/ra: Fix payload node setup for SIMD16 on Gen4-5

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Since 40e1d798c6, we are now using physical register numbers for
everything which makes it all simpler.  In particular, we no longer need
the special case for setting up the payload for SIMD16 on Gen4-5.  This
fixes a pile of piglit tests on ILK and similar.

Fixes: 40e1d798c6 "intel/fs: Use ra_alloc_contig_reg_class()..."
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11221>
This commit is contained in:
Jason Ekstrand
2021-06-07 10:18:03 -05:00
committed by Marge Bot
parent 8621bd8d5e
commit 9e0fd49858
1 changed files with 2 additions and 17 deletions
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19
src/intel/compiler/brw_fs_reg_allocate.cpp
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@@ -671,23 +671,8 @@ fs_reg_alloc::build_interference_graph(bool allow_spilling)
ralloc_steal(mem_ctx, g);
/* Set up the payload nodes */
for (int i = 0; i < payload_node_count; i++) {
/* Mark each payload node as being allocated to its physical register.
*
* The alternative would be to have per-physical-register classes, which
* would just be silly.
*/
if (devinfo->ver <= 5 && fs->dispatch_width >= 16) {
/* We have to divide by 2 here because we only have even numbered
* registers. Some of the payload registers will be odd, but
* that's ok because their physical register numbers have already
* been assigned. The only thing this is used for is interference.
*/
ra_set_node_reg(g, first_payload_node + i, i / 2);
} else {
ra_set_node_reg(g, first_payload_node + i, i);
}
}
for (int i = 0; i < payload_node_count; i++)
ra_set_node_reg(g, first_payload_node + i, i);
if (first_mrf_hack_node >= 0) {
/* Mark each MRF reg node as being allocated to its physical