vulkan/runtime: include robustness info when hashing a shader stage

Suggested by Jason Ekstrand.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18883>
This commit is contained in:
Iago Toral Quiroga
2022-09-28 08:31:57 +02:00
committed by Marge Bot
parent c3641f413a
commit 9deef4cde6
8 changed files with 29 additions and 19 deletions

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@@ -3626,7 +3626,7 @@ radv_pipeline_stage_init(const VkPipelineShaderStageCreateInfo *sinfo,
out_stage->spirv.size = minfo->codeSize;
}
vk_pipeline_hash_shader_stage(sinfo, out_stage->shader_sha1);
vk_pipeline_hash_shader_stage(sinfo, NULL, out_stage->shader_sha1);
}
static struct radv_shader *

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@@ -69,7 +69,7 @@ pipeline_compute_sha1_from_nir(struct v3dv_pipeline_stage *p_stage)
.stage = mesa_to_vk_shader_stage(p_stage->nir->info.stage),
};
vk_pipeline_hash_shader_stage(&info, p_stage->shader_sha1);
vk_pipeline_hash_shader_stage(&info, NULL, p_stage->shader_sha1);
}
void
@@ -2302,7 +2302,8 @@ pipeline_compile_graphics(struct v3dv_pipeline *pipeline,
p_stage->module = vk_shader_module_from_handle(sinfo->module);
p_stage->spec_info = sinfo->pSpecializationInfo;
vk_pipeline_hash_shader_stage(&pCreateInfo->pStages[i], p_stage->shader_sha1);
vk_pipeline_hash_shader_stage(&pCreateInfo->pStages[i], NULL,
p_stage->shader_sha1);
pipeline->active_stages |= sinfo->stage;
@@ -3085,7 +3086,7 @@ pipeline_compile_compute(struct v3dv_pipeline *pipeline,
p_stage->spec_info = sinfo->pSpecializationInfo;
p_stage->feedback = (VkPipelineCreationFeedback) { 0 };
vk_pipeline_hash_shader_stage(&info->stage, p_stage->shader_sha1);
vk_pipeline_hash_shader_stage(&info->stage, NULL, p_stage->shader_sha1);
p_stage->nir = NULL;

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@@ -2801,7 +2801,7 @@ tu_hash_stage(struct mesa_sha1 *ctx,
blob_finish(&blob);
} else {
unsigned char stage_hash[SHA1_DIGEST_LENGTH];
vk_pipeline_hash_shader_stage(stage, stage_hash);
vk_pipeline_hash_shader_stage(stage, NULL, stage_hash);
_mesa_sha1_update(ctx, stage_hash, sizeof(stage_hash));
}
_mesa_sha1_update(ctx, key, sizeof(*key));

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@@ -1525,7 +1525,7 @@ anv_graphics_pipeline_init_keys(struct anv_graphics_pipeline *pipeline,
int64_t stage_start = os_time_get_nano();
vk_pipeline_hash_shader_stage(stages[s].info, stages[s].shader_sha1);
vk_pipeline_hash_shader_stage(stages[s].info, NULL, stages[s].shader_sha1);
const struct anv_device *device = pipeline->base.device;
switch (stages[s].stage) {
@@ -2056,7 +2056,7 @@ anv_pipeline_compile_cs(struct anv_compute_pipeline *pipeline,
.flags = VK_PIPELINE_CREATION_FEEDBACK_VALID_BIT,
},
};
vk_pipeline_hash_shader_stage(&info->stage, stage.shader_sha1);
vk_pipeline_hash_shader_stage(&info->stage, NULL, stage.shader_sha1);
struct anv_shader_bin *bin = NULL;
@@ -2643,7 +2643,7 @@ anv_pipeline_init_ray_tracing_stages(struct anv_ray_tracing_pipeline *pipeline,
ray_flags,
&stages[i].key.bs);
vk_pipeline_hash_shader_stage(sinfo, stages[i].shader_sha1);
vk_pipeline_hash_shader_stage(sinfo, NULL, stages[i].shader_sha1);
if (stages[i].stage != MESA_SHADER_INTERSECTION) {
anv_pipeline_hash_ray_tracing_shader(pipeline, layout, &stages[i],

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@@ -1168,7 +1168,7 @@ anv_graphics_pipeline_init_keys(struct anv_graphics_pipeline *pipeline,
int64_t stage_start = os_time_get_nano();
vk_pipeline_hash_shader_stage(stages[s].info, stages[s].shader_sha1);
vk_pipeline_hash_shader_stage(stages[s].info, NULL, stages[s].shader_sha1);
const struct anv_device *device = pipeline->base.device;
switch (stages[s].stage) {
@@ -1619,7 +1619,7 @@ anv_pipeline_compile_cs(struct anv_compute_pipeline *pipeline,
.flags = VK_PIPELINE_CREATION_FEEDBACK_VALID_BIT,
},
};
vk_pipeline_hash_shader_stage(&info->stage, stage.shader_sha1);
vk_pipeline_hash_shader_stage(&info->stage, NULL, stage.shader_sha1);
struct anv_shader_bin *bin = NULL;

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@@ -763,7 +763,7 @@ dzn_graphics_pipeline_compile_shaders(struct dzn_device *device,
_mesa_sha1_update(&pipeline_hash_ctx, &force_sample_rate_shading, sizeof(force_sample_rate_shading));
u_foreach_bit(stage, active_stage_mask) {
vk_pipeline_hash_shader_stage(stages[stage].info, stages[stage].spirv_hash);
vk_pipeline_hash_shader_stage(stages[stage].info, NULL, stages[stage].spirv_hash);
_mesa_sha1_update(&pipeline_hash_ctx, stages[stage].spirv_hash, sizeof(stages[stage].spirv_hash));
_mesa_sha1_update(&pipeline_hash_ctx, layout->stages[stage].hash, sizeof(layout->stages[stage].hash));
}
@@ -2097,7 +2097,7 @@ dzn_compute_pipeline_compile_shader(struct dzn_device *device,
struct mesa_sha1 pipeline_hash_ctx;
_mesa_sha1_init(&pipeline_hash_ctx);
vk_pipeline_hash_shader_stage(&info->stage, spirv_hash);
vk_pipeline_hash_shader_stage(&info->stage, NULL, spirv_hash);
_mesa_sha1_update(&pipeline_hash_ctx, spirv_hash, sizeof(spirv_hash));
_mesa_sha1_update(&pipeline_hash_ctx, layout->stages[MESA_SHADER_COMPUTE].hash,
sizeof(layout->stages[MESA_SHADER_COMPUTE].hash));

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@@ -136,6 +136,7 @@ vk_pipeline_shader_stage_to_nir(struct vk_device *device,
void
vk_pipeline_hash_shader_stage(const VkPipelineShaderStageCreateInfo *info,
const struct vk_pipeline_robustness_state *rstate,
unsigned char *stage_sha1)
{
VK_FROM_HANDLE(vk_shader_module, module, info->module);
@@ -189,6 +190,13 @@ vk_pipeline_hash_shader_stage(const VkPipelineShaderStageCreateInfo *info,
_mesa_sha1_update(&ctx, iinfo->pIdentifier, iinfo->identifierSize);
}
if (rstate) {
_mesa_sha1_update(&ctx, &rstate->storage_buffers, sizeof(rstate->storage_buffers));
_mesa_sha1_update(&ctx, &rstate->uniform_buffers, sizeof(rstate->uniform_buffers));
_mesa_sha1_update(&ctx, &rstate->vertex_inputs, sizeof(rstate->vertex_inputs));
_mesa_sha1_update(&ctx, &rstate->images, sizeof(rstate->images));
}
_mesa_sha1_update(&ctx, info->pName, strlen(info->pName));
if (info->pSpecializationInfo) {

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@@ -47,6 +47,13 @@ vk_pipeline_shader_stage_to_nir(struct vk_device *device,
const struct nir_shader_compiler_options *nir_options,
void *mem_ctx, struct nir_shader **nir_out);
struct vk_pipeline_robustness_state {
VkPipelineRobustnessBufferBehaviorEXT storage_buffers;
VkPipelineRobustnessBufferBehaviorEXT uniform_buffers;
VkPipelineRobustnessBufferBehaviorEXT vertex_inputs;
VkPipelineRobustnessImageBehaviorEXT images;
};
/** Hash VkPipelineShaderStageCreateInfo info
*
* Returns the hash of a VkPipelineShaderStageCreateInfo:
@@ -60,15 +67,9 @@ vk_pipeline_shader_stage_to_nir(struct vk_device *device,
*/
void
vk_pipeline_hash_shader_stage(const VkPipelineShaderStageCreateInfo *info,
const struct vk_pipeline_robustness_state *rstate,
unsigned char *stage_sha1);
struct vk_pipeline_robustness_state {
VkPipelineRobustnessBufferBehaviorEXT storage_buffers;
VkPipelineRobustnessBufferBehaviorEXT uniform_buffers;
VkPipelineRobustnessBufferBehaviorEXT vertex_inputs;
VkPipelineRobustnessImageBehaviorEXT images;
};
void
vk_pipeline_robustness_state_fill(const struct vk_device *device,
struct vk_pipeline_robustness_state *rs,