From 9deef4cde6bcb3c1813a0addf018879c7eeb92fb Mon Sep 17 00:00:00 2001 From: Iago Toral Quiroga Date: Wed, 28 Sep 2022 08:31:57 +0200 Subject: [PATCH] vulkan/runtime: include robustness info when hashing a shader stage MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Suggested by Jason Ekstrand. Reviewed-by: Alejandro Piñeiro Part-of: --- src/amd/vulkan/radv_pipeline.c | 2 +- src/broadcom/vulkan/v3dv_pipeline.c | 7 ++++--- src/freedreno/vulkan/tu_pipeline.c | 2 +- src/intel/vulkan/anv_pipeline.c | 6 +++--- src/intel/vulkan_hasvk/anv_pipeline.c | 4 ++-- src/microsoft/vulkan/dzn_pipeline.c | 4 ++-- src/vulkan/runtime/vk_pipeline.c | 8 ++++++++ src/vulkan/runtime/vk_pipeline.h | 15 ++++++++------- 8 files changed, 29 insertions(+), 19 deletions(-) diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c index 598b1de8382..33042af6828 100644 --- a/src/amd/vulkan/radv_pipeline.c +++ b/src/amd/vulkan/radv_pipeline.c @@ -3626,7 +3626,7 @@ radv_pipeline_stage_init(const VkPipelineShaderStageCreateInfo *sinfo, out_stage->spirv.size = minfo->codeSize; } - vk_pipeline_hash_shader_stage(sinfo, out_stage->shader_sha1); + vk_pipeline_hash_shader_stage(sinfo, NULL, out_stage->shader_sha1); } static struct radv_shader * diff --git a/src/broadcom/vulkan/v3dv_pipeline.c b/src/broadcom/vulkan/v3dv_pipeline.c index 5eee8ec0f01..1526677353b 100644 --- a/src/broadcom/vulkan/v3dv_pipeline.c +++ b/src/broadcom/vulkan/v3dv_pipeline.c @@ -69,7 +69,7 @@ pipeline_compute_sha1_from_nir(struct v3dv_pipeline_stage *p_stage) .stage = mesa_to_vk_shader_stage(p_stage->nir->info.stage), }; - vk_pipeline_hash_shader_stage(&info, p_stage->shader_sha1); + vk_pipeline_hash_shader_stage(&info, NULL, p_stage->shader_sha1); } void @@ -2302,7 +2302,8 @@ pipeline_compile_graphics(struct v3dv_pipeline *pipeline, p_stage->module = vk_shader_module_from_handle(sinfo->module); p_stage->spec_info = sinfo->pSpecializationInfo; - vk_pipeline_hash_shader_stage(&pCreateInfo->pStages[i], p_stage->shader_sha1); + vk_pipeline_hash_shader_stage(&pCreateInfo->pStages[i], NULL, + p_stage->shader_sha1); pipeline->active_stages |= sinfo->stage; @@ -3085,7 +3086,7 @@ pipeline_compile_compute(struct v3dv_pipeline *pipeline, p_stage->spec_info = sinfo->pSpecializationInfo; p_stage->feedback = (VkPipelineCreationFeedback) { 0 }; - vk_pipeline_hash_shader_stage(&info->stage, p_stage->shader_sha1); + vk_pipeline_hash_shader_stage(&info->stage, NULL, p_stage->shader_sha1); p_stage->nir = NULL; diff --git a/src/freedreno/vulkan/tu_pipeline.c b/src/freedreno/vulkan/tu_pipeline.c index a2a44246e2d..1647a5b79fb 100644 --- a/src/freedreno/vulkan/tu_pipeline.c +++ b/src/freedreno/vulkan/tu_pipeline.c @@ -2801,7 +2801,7 @@ tu_hash_stage(struct mesa_sha1 *ctx, blob_finish(&blob); } else { unsigned char stage_hash[SHA1_DIGEST_LENGTH]; - vk_pipeline_hash_shader_stage(stage, stage_hash); + vk_pipeline_hash_shader_stage(stage, NULL, stage_hash); _mesa_sha1_update(ctx, stage_hash, sizeof(stage_hash)); } _mesa_sha1_update(ctx, key, sizeof(*key)); diff --git a/src/intel/vulkan/anv_pipeline.c b/src/intel/vulkan/anv_pipeline.c index a5aabdbc3ca..82c1a10a9fa 100644 --- a/src/intel/vulkan/anv_pipeline.c +++ b/src/intel/vulkan/anv_pipeline.c @@ -1525,7 +1525,7 @@ anv_graphics_pipeline_init_keys(struct anv_graphics_pipeline *pipeline, int64_t stage_start = os_time_get_nano(); - vk_pipeline_hash_shader_stage(stages[s].info, stages[s].shader_sha1); + vk_pipeline_hash_shader_stage(stages[s].info, NULL, stages[s].shader_sha1); const struct anv_device *device = pipeline->base.device; switch (stages[s].stage) { @@ -2056,7 +2056,7 @@ anv_pipeline_compile_cs(struct anv_compute_pipeline *pipeline, .flags = VK_PIPELINE_CREATION_FEEDBACK_VALID_BIT, }, }; - vk_pipeline_hash_shader_stage(&info->stage, stage.shader_sha1); + vk_pipeline_hash_shader_stage(&info->stage, NULL, stage.shader_sha1); struct anv_shader_bin *bin = NULL; @@ -2643,7 +2643,7 @@ anv_pipeline_init_ray_tracing_stages(struct anv_ray_tracing_pipeline *pipeline, ray_flags, &stages[i].key.bs); - vk_pipeline_hash_shader_stage(sinfo, stages[i].shader_sha1); + vk_pipeline_hash_shader_stage(sinfo, NULL, stages[i].shader_sha1); if (stages[i].stage != MESA_SHADER_INTERSECTION) { anv_pipeline_hash_ray_tracing_shader(pipeline, layout, &stages[i], diff --git a/src/intel/vulkan_hasvk/anv_pipeline.c b/src/intel/vulkan_hasvk/anv_pipeline.c index 4d5aaddf1ba..3df2ab64a11 100644 --- a/src/intel/vulkan_hasvk/anv_pipeline.c +++ b/src/intel/vulkan_hasvk/anv_pipeline.c @@ -1168,7 +1168,7 @@ anv_graphics_pipeline_init_keys(struct anv_graphics_pipeline *pipeline, int64_t stage_start = os_time_get_nano(); - vk_pipeline_hash_shader_stage(stages[s].info, stages[s].shader_sha1); + vk_pipeline_hash_shader_stage(stages[s].info, NULL, stages[s].shader_sha1); const struct anv_device *device = pipeline->base.device; switch (stages[s].stage) { @@ -1619,7 +1619,7 @@ anv_pipeline_compile_cs(struct anv_compute_pipeline *pipeline, .flags = VK_PIPELINE_CREATION_FEEDBACK_VALID_BIT, }, }; - vk_pipeline_hash_shader_stage(&info->stage, stage.shader_sha1); + vk_pipeline_hash_shader_stage(&info->stage, NULL, stage.shader_sha1); struct anv_shader_bin *bin = NULL; diff --git a/src/microsoft/vulkan/dzn_pipeline.c b/src/microsoft/vulkan/dzn_pipeline.c index dc9c205c44d..ec5ba628f6b 100644 --- a/src/microsoft/vulkan/dzn_pipeline.c +++ b/src/microsoft/vulkan/dzn_pipeline.c @@ -763,7 +763,7 @@ dzn_graphics_pipeline_compile_shaders(struct dzn_device *device, _mesa_sha1_update(&pipeline_hash_ctx, &force_sample_rate_shading, sizeof(force_sample_rate_shading)); u_foreach_bit(stage, active_stage_mask) { - vk_pipeline_hash_shader_stage(stages[stage].info, stages[stage].spirv_hash); + vk_pipeline_hash_shader_stage(stages[stage].info, NULL, stages[stage].spirv_hash); _mesa_sha1_update(&pipeline_hash_ctx, stages[stage].spirv_hash, sizeof(stages[stage].spirv_hash)); _mesa_sha1_update(&pipeline_hash_ctx, layout->stages[stage].hash, sizeof(layout->stages[stage].hash)); } @@ -2097,7 +2097,7 @@ dzn_compute_pipeline_compile_shader(struct dzn_device *device, struct mesa_sha1 pipeline_hash_ctx; _mesa_sha1_init(&pipeline_hash_ctx); - vk_pipeline_hash_shader_stage(&info->stage, spirv_hash); + vk_pipeline_hash_shader_stage(&info->stage, NULL, spirv_hash); _mesa_sha1_update(&pipeline_hash_ctx, spirv_hash, sizeof(spirv_hash)); _mesa_sha1_update(&pipeline_hash_ctx, layout->stages[MESA_SHADER_COMPUTE].hash, sizeof(layout->stages[MESA_SHADER_COMPUTE].hash)); diff --git a/src/vulkan/runtime/vk_pipeline.c b/src/vulkan/runtime/vk_pipeline.c index 8b7f9209acd..694354b30c4 100644 --- a/src/vulkan/runtime/vk_pipeline.c +++ b/src/vulkan/runtime/vk_pipeline.c @@ -136,6 +136,7 @@ vk_pipeline_shader_stage_to_nir(struct vk_device *device, void vk_pipeline_hash_shader_stage(const VkPipelineShaderStageCreateInfo *info, + const struct vk_pipeline_robustness_state *rstate, unsigned char *stage_sha1) { VK_FROM_HANDLE(vk_shader_module, module, info->module); @@ -189,6 +190,13 @@ vk_pipeline_hash_shader_stage(const VkPipelineShaderStageCreateInfo *info, _mesa_sha1_update(&ctx, iinfo->pIdentifier, iinfo->identifierSize); } + if (rstate) { + _mesa_sha1_update(&ctx, &rstate->storage_buffers, sizeof(rstate->storage_buffers)); + _mesa_sha1_update(&ctx, &rstate->uniform_buffers, sizeof(rstate->uniform_buffers)); + _mesa_sha1_update(&ctx, &rstate->vertex_inputs, sizeof(rstate->vertex_inputs)); + _mesa_sha1_update(&ctx, &rstate->images, sizeof(rstate->images)); + } + _mesa_sha1_update(&ctx, info->pName, strlen(info->pName)); if (info->pSpecializationInfo) { diff --git a/src/vulkan/runtime/vk_pipeline.h b/src/vulkan/runtime/vk_pipeline.h index 76a8d58fad6..a6d84177f8c 100644 --- a/src/vulkan/runtime/vk_pipeline.h +++ b/src/vulkan/runtime/vk_pipeline.h @@ -47,6 +47,13 @@ vk_pipeline_shader_stage_to_nir(struct vk_device *device, const struct nir_shader_compiler_options *nir_options, void *mem_ctx, struct nir_shader **nir_out); +struct vk_pipeline_robustness_state { + VkPipelineRobustnessBufferBehaviorEXT storage_buffers; + VkPipelineRobustnessBufferBehaviorEXT uniform_buffers; + VkPipelineRobustnessBufferBehaviorEXT vertex_inputs; + VkPipelineRobustnessImageBehaviorEXT images; +}; + /** Hash VkPipelineShaderStageCreateInfo info * * Returns the hash of a VkPipelineShaderStageCreateInfo: @@ -60,15 +67,9 @@ vk_pipeline_shader_stage_to_nir(struct vk_device *device, */ void vk_pipeline_hash_shader_stage(const VkPipelineShaderStageCreateInfo *info, + const struct vk_pipeline_robustness_state *rstate, unsigned char *stage_sha1); -struct vk_pipeline_robustness_state { - VkPipelineRobustnessBufferBehaviorEXT storage_buffers; - VkPipelineRobustnessBufferBehaviorEXT uniform_buffers; - VkPipelineRobustnessBufferBehaviorEXT vertex_inputs; - VkPipelineRobustnessImageBehaviorEXT images; -}; - void vk_pipeline_robustness_state_fill(const struct vk_device *device, struct vk_pipeline_robustness_state *rs,