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anv: dynamic state for logic op enable

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This affects following packets:

  3DSTATE_PS_BLEND
  3DSTATE_BLEND_STATE_POINTERS

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18879>
This commit is contained in:
Tapani Pälli
2022-09-04 19:14:40 +03:00
committed by Marge Bot
parent ad2e80ee53
commit 9dc6bed9a1
2 changed files with 9 additions and 5 deletions
Download Patch File Download Diff File Expand all files Collapse all files

6
src/intel/vulkan/genX_pipeline.c
View File

@@ -923,8 +923,6 @@ emit_cb_state(struct anv_graphics_pipeline *pipeline,
&cb->attachments[binding->index]; &cb->attachments[binding->index];
struct GENX(BLEND_STATE_ENTRY) entry = { struct GENX(BLEND_STATE_ENTRY) entry = {
.LogicOpEnable = cb->logic_op_enable,
/* Vulkan specification 1.2.168, VkLogicOp: /* Vulkan specification 1.2.168, VkLogicOp:
* *
* "Logical operations are controlled by the logicOpEnable and * "Logical operations are controlled by the logicOpEnable and
@@ -939,8 +937,9 @@ emit_cb_state(struct anv_graphics_pipeline *pipeline,
* *
* "Enabling LogicOp and Color Buffer Blending at the same time is * "Enabling LogicOp and Color Buffer Blending at the same time is
* UNDEFINED" * UNDEFINED"
*
* Above is handled during emit since these states are dynamic.
*/ */
.ColorBufferBlendEnable = !cb->logic_op_enable && a->blend_enable,
.ColorClampRange = COLORCLAMP_RTFORMAT, .ColorClampRange = COLORCLAMP_RTFORMAT,
.PreBlendColorClampEnable = true, .PreBlendColorClampEnable = true,
.PostBlendColorClampEnable = true, .PostBlendColorClampEnable = true,
@@ -1006,7 +1005,6 @@ emit_cb_state(struct anv_graphics_pipeline *pipeline,
GENX(3DSTATE_PS_BLEND_header), GENX(3DSTATE_PS_BLEND_header),
}; };
blend.AlphaToCoverageEnable = blend_state.AlphaToCoverageEnable; blend.AlphaToCoverageEnable = blend_state.AlphaToCoverageEnable;
blend.ColorBufferBlendEnable = bs0.ColorBufferBlendEnable;
blend.SourceAlphaBlendFactor = bs0.SourceAlphaBlendFactor; blend.SourceAlphaBlendFactor = bs0.SourceAlphaBlendFactor;
blend.DestinationAlphaBlendFactor = bs0.DestinationAlphaBlendFactor; blend.DestinationAlphaBlendFactor = bs0.DestinationAlphaBlendFactor;
blend.SourceBlendFactor = bs0.SourceBlendFactor; blend.SourceBlendFactor = bs0.SourceBlendFactor;

8
src/intel/vulkan/gfx8_cmd_buffer.c
View File

@@ -519,7 +519,8 @@ genX(cmd_buffer_flush_dynamic_state)(struct anv_cmd_buffer *cmd_buffer)
if ((cmd_buffer->state.gfx.dirty & ANV_CMD_DIRTY_PIPELINE) || if ((cmd_buffer->state.gfx.dirty & ANV_CMD_DIRTY_PIPELINE) ||
BITSET_TEST(dyn->dirty, MESA_VK_DYNAMIC_CB_LOGIC_OP) || BITSET_TEST(dyn->dirty, MESA_VK_DYNAMIC_CB_LOGIC_OP) ||
BITSET_TEST(dyn->dirty, MESA_VK_DYNAMIC_CB_COLOR_WRITE_ENABLES)) { BITSET_TEST(dyn->dirty, MESA_VK_DYNAMIC_CB_COLOR_WRITE_ENABLES) ||
BITSET_TEST(dyn->dirty, MESA_VK_DYNAMIC_CB_LOGIC_OP_ENABLE)) {
const uint8_t color_writes = dyn->cb.color_write_enables; const uint8_t color_writes = dyn->cb.color_write_enables;
const struct anv_cmd_graphics_state *state = &cmd_buffer->state.gfx; const struct anv_cmd_graphics_state *state = &cmd_buffer->state.gfx;
bool has_writeable_rt = bool has_writeable_rt =
@@ -533,6 +534,8 @@ genX(cmd_buffer_flush_dynamic_state)(struct anv_cmd_buffer *cmd_buffer)
struct GENX(3DSTATE_PS_BLEND) ps_blend = { struct GENX(3DSTATE_PS_BLEND) ps_blend = {
GENX(3DSTATE_PS_BLEND_header), GENX(3DSTATE_PS_BLEND_header),
.HasWriteableRT = has_writeable_rt, .HasWriteableRT = has_writeable_rt,
.ColorBufferBlendEnable =
!dyn->cb.logic_op_enable && dyn->cb.attachments[0].blend_enable,
}; };
GENX(3DSTATE_PS_BLEND_pack)(NULL, ps_blend_dwords, &ps_blend); GENX(3DSTATE_PS_BLEND_pack)(NULL, ps_blend_dwords, &ps_blend);
anv_batch_emit_merge(&cmd_buffer->batch, ps_blend_dwords, anv_batch_emit_merge(&cmd_buffer->batch, ps_blend_dwords,
@@ -564,6 +567,9 @@ genX(cmd_buffer_flush_dynamic_state)(struct anv_cmd_buffer *cmd_buffer)
(pipeline->color_comp_writes[i] & (pipeline->color_comp_writes[i] &
VK_COLOR_COMPONENT_B_BIT) == 0, VK_COLOR_COMPONENT_B_BIT) == 0,
.LogicOpFunction = genX(vk_to_intel_logic_op)[dyn->cb.logic_op], .LogicOpFunction = genX(vk_to_intel_logic_op)[dyn->cb.logic_op],
.LogicOpEnable = dyn->cb.logic_op_enable,
.ColorBufferBlendEnable =
!dyn->cb.logic_op_enable && dyn->cb.attachments[i].blend_enable,
}; };
GENX(BLEND_STATE_ENTRY_pack)(NULL, dws, &entry); GENX(BLEND_STATE_ENTRY_pack)(NULL, dws, &entry);
dws += GENX(BLEND_STATE_ENTRY_length); dws += GENX(BLEND_STATE_ENTRY_length);