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nir/opt_varyings: Print FS VEC4 type when debugging relocate_slot.

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Useful when debugging this pass.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29208>
This commit is contained in:
Timur Kristóf
2024-05-22 23:47:23 +02:00
committed by Marge Bot
parent 72330e607f
commit 9dad0ced52
1 changed files with 16 additions and 2 deletions
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18
src/compiler/nir/nir_opt_varyings.c
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@@ -509,6 +509,19 @@ enum fs_vec4_type {
FS_VEC4_TYPE_PER_PRIMITIVE,
};
#if PRINT_RELOCATE_SLOT
static const char *fs_vec4_type_strings[] = {
"NONE",
"FLAT",
"INTERP_FP32",
"INTERP_FP16",
"INTERP_COLOR",
"INTERP_EXPLICIT",
"INTERP_EXPLICIT_STRICT",
"PER_PRIMITIVE",
};
#endif // PRINT_RELOCATE_SLOT
static unsigned
get_scalar_16bit_slot(nir_io_semantics sem, unsigned component)
{
@@ -3662,7 +3675,7 @@ relocate_slot(struct linkage_info *linkage, struct scalar_slot *slot,
assert(bit_size == 16 || bit_size == 32);
fprintf(stderr, "--- relocating: %s.%c%s%s -> %s.%c%s%s\n",
fprintf(stderr, "--- relocating: %s.%c%s%s -> %s.%c%s%s FS_VEC4_TYPE_%s\n",
gl_varying_slot_name_for_stage(sem.location, linkage->producer_stage) + 13,
"xyzw"[nir_intrinsic_component(intr) % 4],
(bit_size == 16 && !sem.high_16bits) ? ".lo" : "",
@@ -3670,7 +3683,8 @@ relocate_slot(struct linkage_info *linkage, struct scalar_slot *slot,
gl_varying_slot_name_for_stage(new_semantic, linkage->producer_stage) + 13,
"xyzw"[new_component % 4],
(bit_size == 16 && !new_high_16bits) ? ".lo" : "",
(bit_size == 16 && new_high_16bits) ? ".hi" : "");
(bit_size == 16 && new_high_16bits) ? ".hi" : "",
fs_vec4_type_strings[fs_vec4_type]);
#endif /* PRINT_RELOCATE_SLOT */
sem.location = new_semantic;