intel: Rename GEN_GEN macro to GFX_VER
Commands used to do the changes: export SEARCH_PATH="src/intel src/gallium/drivers/iris src/mesa/drivers/dri/i965" grep -E "GEN_GEN" -rIl $SEARCH_PATH | xargs sed -ie "s/GEN_GEN/GFX_VER/g" Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9936>
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@@ -37,7 +37,7 @@
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* - GPR 15 for conditional rendering
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*/
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#define MI_BUILDER_NUM_ALLOC_GPRS 14
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#define MI_BUILDER_CAN_WRITE_BATCH GEN_GEN >= 8
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#define MI_BUILDER_CAN_WRITE_BATCH GFX_VER >= 8
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#define __gen_get_batch_dwords anv_batch_emit_dwords
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#define __gen_address_offset anv_address_add
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#define __gen_get_batch_address(b, a) anv_batch_address(b, a)
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@@ -65,7 +65,7 @@ VkResult genX(CreateQueryPool)(
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{
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ANV_FROM_HANDLE(anv_device, device, _device);
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const struct anv_physical_device *pdevice = device->physical;
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#if GEN_GEN >= 8
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#if GFX_VER >= 8
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const VkQueryPoolPerformanceCreateInfoKHR *perf_query_info = NULL;
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struct gen_perf_counter_pass *counter_pass;
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struct gen_perf_query_info **pass_query;
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@@ -130,7 +130,7 @@ VkResult genX(CreateQueryPool)(
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uint64s_per_slot += 2 * DIV_ROUND_UP(layout->size, sizeof(uint64_t));
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break;
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}
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#if GEN_GEN >= 8
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#if GFX_VER >= 8
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case VK_QUERY_TYPE_PERFORMANCE_QUERY_KHR: {
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const struct gen_perf_query_field_layout *layout =
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&pdevice->perf->query_layout;
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@@ -176,7 +176,7 @@ VkResult genX(CreateQueryPool)(
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pool->data_offset = data_offset;
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pool->snapshot_size = (pool->stride - data_offset) / 2;
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}
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#if GEN_GEN >= 8
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#if GFX_VER >= 8
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else if (pool->type == VK_QUERY_TYPE_PERFORMANCE_QUERY_KHR) {
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pool->pass_size = pool->stride / n_passes;
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pool->data_offset = data_offset;
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@@ -215,7 +215,7 @@ VkResult genX(CreateQueryPool)(
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if (result != VK_SUCCESS)
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goto fail;
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#if GEN_GEN >= 8
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#if GFX_VER >= 8
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if (pool->type == VK_QUERY_TYPE_PERFORMANCE_QUERY_KHR) {
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for (uint32_t p = 0; p < pool->n_passes; p++) {
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struct mi_builder b;
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@@ -259,7 +259,7 @@ void genX(DestroyQueryPool)(
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vk_free2(&device->vk.alloc, pAllocator, pool);
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}
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#if GEN_GEN >= 8
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#if GFX_VER >= 8
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/**
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* VK_KHR_performance_query layout :
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*
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@@ -409,7 +409,7 @@ query_slot(struct anv_query_pool *pool, uint32_t query)
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static bool
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query_is_available(struct anv_query_pool *pool, uint32_t query)
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{
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#if GEN_GEN >= 8
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#if GFX_VER >= 8
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if (pool->type == VK_QUERY_TYPE_PERFORMANCE_QUERY_KHR) {
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for (uint32_t p = 0; p < pool->n_passes; p++) {
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volatile uint64_t *slot =
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@@ -558,7 +558,7 @@ VkResult genX(GetQueryPoolResults)(
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break;
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}
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#if GEN_GEN >= 8
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#if GFX_VER >= 8
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case VK_QUERY_TYPE_PERFORMANCE_QUERY_KHR: {
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const struct anv_physical_device *pdevice = device->physical;
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assert((flags & (VK_QUERY_RESULT_WITH_AVAILABILITY_BIT |
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@@ -627,7 +627,7 @@ emit_ps_depth_count(struct anv_cmd_buffer *cmd_buffer,
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pc.DepthStallEnable = true;
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pc.Address = addr;
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if (GEN_GEN == 9 && cmd_buffer->device->info.gt == 4)
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if (GFX_VER == 9 && cmd_buffer->device->info.gt == 4)
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pc.CommandStreamerStallEnable = true;
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}
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}
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@@ -696,7 +696,7 @@ emit_zero_queries(struct anv_cmd_buffer *cmd_buffer,
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}
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break;
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#if GEN_GEN >= 8
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#if GFX_VER >= 8
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case VK_QUERY_TYPE_PERFORMANCE_QUERY_KHR: {
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for (uint32_t i = 0; i < num_queries; i++) {
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for (uint32_t p = 0; p < pool->n_passes; p++) {
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@@ -754,7 +754,7 @@ void genX(CmdResetQueryPool)(
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break;
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}
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#if GEN_GEN >= 8
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#if GFX_VER >= 8
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case VK_QUERY_TYPE_PERFORMANCE_QUERY_KHR: {
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struct mi_builder b;
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mi_builder_init(&b, &cmd_buffer->device->info, &cmd_buffer->batch);
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@@ -795,7 +795,7 @@ void genX(ResetQueryPool)(
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for (uint32_t i = 0; i < queryCount; i++) {
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if (pool->type == VK_QUERY_TYPE_PERFORMANCE_QUERY_KHR) {
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#if GEN_GEN >= 8
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#if GFX_VER >= 8
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for (uint32_t p = 0; p < pool->n_passes; p++) {
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uint64_t *pass_slot = pool->bo->map +
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khr_perf_query_availability_offset(pool, firstQuery + i, p);
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@@ -943,7 +943,7 @@ void genX(CmdBeginQueryIndexedEXT)(
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emit_xfb_query(&b, index, anv_address_add(query_addr, 8));
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break;
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#if GEN_GEN >= 8
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#if GFX_VER >= 8
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case VK_QUERY_TYPE_PERFORMANCE_QUERY_KHR: {
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if (!khr_perf_query_ensure_relocs(cmd_buffer))
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return;
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@@ -1125,7 +1125,7 @@ void genX(CmdEndQueryIndexedEXT)(
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emit_query_mi_availability(&b, query_addr, true);
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break;
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#if GEN_GEN >= 8
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#if GFX_VER >= 8
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case VK_QUERY_TYPE_PERFORMANCE_QUERY_KHR: {
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anv_batch_emit(&cmd_buffer->batch, GENX(PIPE_CONTROL), pc) {
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pc.CommandStreamerStallEnable = true;
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@@ -1270,7 +1270,7 @@ void genX(CmdWriteTimestamp)(
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pc.PostSyncOperation = WriteTimestamp;
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pc.Address = anv_address_add(query_addr, 8);
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if (GEN_GEN == 9 && cmd_buffer->device->info.gt == 4)
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if (GFX_VER == 9 && cmd_buffer->device->info.gt == 4)
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pc.CommandStreamerStallEnable = true;
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}
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break;
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@@ -1454,7 +1454,7 @@ void genX(CmdCopyQueryPoolResults)(
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gpu_write_query_result(&b, dest_addr, flags, 0, result);
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break;
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#if GEN_GEN >= 8
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#if GFX_VER >= 8
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case VK_QUERY_TYPE_PERFORMANCE_QUERY_KHR:
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unreachable("Copy KHR performance query results not implemented");
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break;
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