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microsoft/spirv_to_dxil: Let linking report the need of runtime data

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Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20608>
This commit is contained in:
Pedro J. Estébanez
2023-01-10 14:02:38 +01:00
committed by Marge Bot
parent 6481805e00
commit 9d814c405b
4 changed files with 14 additions and 4 deletions
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5
src/microsoft/spirv_to_dxil/dxil_spirv_nir.c
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@@ -737,10 +737,12 @@ dxil_spirv_compute_pntc(nir_shader *nir)
void void
dxil_spirv_nir_link(nir_shader *nir, nir_shader *prev_stage_nir, dxil_spirv_nir_link(nir_shader *nir, nir_shader *prev_stage_nir,
const struct dxil_spirv_runtime_conf *conf) const struct dxil_spirv_runtime_conf *conf,
bool *requires_runtime_data)
{ {
glsl_type_singleton_init_or_ref(); glsl_type_singleton_init_or_ref();
*requires_runtime_data = false;
if (prev_stage_nir) { if (prev_stage_nir) {
if (nir->info.stage == MESA_SHADER_FRAGMENT) { if (nir->info.stage == MESA_SHADER_FRAGMENT) {
nir->info.clip_distance_array_size = prev_stage_nir->info.clip_distance_array_size; nir->info.clip_distance_array_size = prev_stage_nir->info.clip_distance_array_size;
@@ -748,6 +750,7 @@ dxil_spirv_nir_link(nir_shader *nir, nir_shader *prev_stage_nir,
if (nir->info.inputs_read & VARYING_BIT_PNTC) { if (nir->info.inputs_read & VARYING_BIT_PNTC) {
NIR_PASS_V(prev_stage_nir, dxil_spirv_write_pntc, conf); NIR_PASS_V(prev_stage_nir, dxil_spirv_write_pntc, conf);
NIR_PASS_V(nir, dxil_spirv_compute_pntc); NIR_PASS_V(nir, dxil_spirv_compute_pntc);
*requires_runtime_data = true;
} }
} }

7
src/microsoft/spirv_to_dxil/dxil_spirv_nir.h
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@@ -31,9 +31,14 @@
void void
dxil_spirv_nir_prep(nir_shader *nir); dxil_spirv_nir_prep(nir_shader *nir);
/* The pipeline will require runtime data if, and only if, any of the multiple reported
* runtime data required flags is true.
*/
void void
dxil_spirv_nir_link(nir_shader *nir, nir_shader *prev_stage_nir, dxil_spirv_nir_link(nir_shader *nir, nir_shader *prev_stage_nir,
const struct dxil_spirv_runtime_conf *conf); const struct dxil_spirv_runtime_conf *conf,
bool *requires_runtime_data);
void void
dxil_spirv_nir_passes(nir_shader *nir, dxil_spirv_nir_passes(nir_shader *nir,

3
src/microsoft/spirv_to_dxil/spirv2dxil.c
View File

@@ -255,7 +255,8 @@ main(int argc, char **argv)
for (int32_t prev = cur - 1; prev >= MESA_SHADER_VERTEX; --prev) { for (int32_t prev = cur - 1; prev >= MESA_SHADER_VERTEX; --prev) {
if (!shaders[prev].nir) if (!shaders[prev].nir)
continue; continue;
dxil_spirv_nir_link(shaders[cur].nir, shaders[prev].nir, &conf); bool requires_runtime_data;
dxil_spirv_nir_link(shaders[cur].nir, shaders[prev].nir, &conf, &requires_runtime_data);
break; break;
} }
} }

3
src/microsoft/vulkan/dzn_pipeline.c
View File

@@ -830,10 +830,11 @@ dzn_graphics_pipeline_compile_shaders(struct dzn_device *device,
}}; }};
assert(pipeline->templates.shaders[stage].nir); assert(pipeline->templates.shaders[stage].nir);
bool requires_runtime_data;
dxil_spirv_nir_link(pipeline->templates.shaders[stage].nir, dxil_spirv_nir_link(pipeline->templates.shaders[stage].nir,
prev_stage != MESA_SHADER_NONE ? prev_stage != MESA_SHADER_NONE ?
pipeline->templates.shaders[prev_stage].nir : NULL, pipeline->templates.shaders[prev_stage].nir : NULL,
&conf); &conf, &requires_runtime_data);
} }
u_foreach_bit(stage, active_stage_mask) { u_foreach_bit(stage, active_stage_mask) {