vk: Move generic pipeline init to anv_pipeline.c
This logic will be shared between multiple gens. Signed-off-by: Kristian Høgsberg Kristensen <kristian.h.kristensen@intel.com>
This commit is contained in:
@@ -170,6 +170,111 @@ VkResult anv_DestroyPipeline(
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return VK_SUCCESS;
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return VK_SUCCESS;
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}
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}
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static const uint32_t vk_to_gen_primitive_type[] = {
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[VK_PRIMITIVE_TOPOLOGY_POINT_LIST] = _3DPRIM_POINTLIST,
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[VK_PRIMITIVE_TOPOLOGY_LINE_LIST] = _3DPRIM_LINELIST,
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[VK_PRIMITIVE_TOPOLOGY_LINE_STRIP] = _3DPRIM_LINESTRIP,
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[VK_PRIMITIVE_TOPOLOGY_TRIANGLE_LIST] = _3DPRIM_TRILIST,
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[VK_PRIMITIVE_TOPOLOGY_TRIANGLE_STRIP] = _3DPRIM_TRISTRIP,
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[VK_PRIMITIVE_TOPOLOGY_TRIANGLE_FAN] = _3DPRIM_TRIFAN,
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[VK_PRIMITIVE_TOPOLOGY_LINE_LIST_ADJ] = _3DPRIM_LINELIST_ADJ,
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[VK_PRIMITIVE_TOPOLOGY_LINE_STRIP_ADJ] = _3DPRIM_LINESTRIP_ADJ,
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[VK_PRIMITIVE_TOPOLOGY_TRIANGLE_LIST_ADJ] = _3DPRIM_TRILIST_ADJ,
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[VK_PRIMITIVE_TOPOLOGY_TRIANGLE_STRIP_ADJ] = _3DPRIM_TRISTRIP_ADJ,
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[VK_PRIMITIVE_TOPOLOGY_PATCH] = _3DPRIM_PATCHLIST_1
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};
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VkResult
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anv_pipeline_init(struct anv_pipeline *pipeline, struct anv_device *device,
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const VkGraphicsPipelineCreateInfo *pCreateInfo,
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const struct anv_graphics_pipeline_create_info *extra)
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{
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pipeline->device = device;
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pipeline->layout = anv_pipeline_layout_from_handle(pCreateInfo->layout);
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memset(pipeline->shaders, 0, sizeof(pipeline->shaders));
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VkResult result;
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result = anv_reloc_list_init(&pipeline->batch_relocs, device);
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if (result != VK_SUCCESS) {
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anv_device_free(device, pipeline);
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return result;
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}
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pipeline->batch.next = pipeline->batch.start = pipeline->batch_data;
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pipeline->batch.end = pipeline->batch.start + sizeof(pipeline->batch_data);
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pipeline->batch.relocs = &pipeline->batch_relocs;
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anv_state_stream_init(&pipeline->program_stream,
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&device->instruction_block_pool);
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for (uint32_t i = 0; i < pCreateInfo->stageCount; i++) {
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pipeline->shaders[pCreateInfo->pStages[i].stage] =
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anv_shader_from_handle(pCreateInfo->pStages[i].shader);
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}
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if (pCreateInfo->pTessellationState)
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anv_finishme("VK_STRUCTURE_TYPE_PIPELINE_TESSELLATION_STATE_CREATE_INFO");
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if (pCreateInfo->pViewportState)
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anv_finishme("VK_STRUCTURE_TYPE_PIPELINE_VIEWPORT_STATE_CREATE_INFO");
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if (pCreateInfo->pMultisampleState)
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anv_finishme("VK_STRUCTURE_TYPE_PIPELINE_MULTISAMPLE_STATE_CREATE_INFO");
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pipeline->use_repclear = extra && extra->use_repclear;
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anv_compiler_run(device->compiler, pipeline);
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const struct brw_wm_prog_data *wm_prog_data = &pipeline->wm_prog_data;
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pipeline->ps_ksp2 = 0;
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pipeline->ps_grf_start2 = 0;
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if (pipeline->ps_simd8 != NO_KERNEL) {
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pipeline->ps_ksp0 = pipeline->ps_simd8;
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pipeline->ps_grf_start0 = wm_prog_data->base.dispatch_grf_start_reg;
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if (pipeline->ps_simd16 != NO_KERNEL) {
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pipeline->ps_ksp2 = pipeline->ps_simd16;
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pipeline->ps_grf_start2 = wm_prog_data->dispatch_grf_start_reg_16;
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}
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} else if (pipeline->ps_simd16 != NO_KERNEL) {
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pipeline->ps_ksp0 = pipeline->ps_simd16;
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pipeline->ps_grf_start0 = wm_prog_data->dispatch_grf_start_reg_16;
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} else {
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unreachable("no ps shader");
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}
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const VkPipelineVertexInputStateCreateInfo *vi_info =
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pCreateInfo->pVertexInputState;
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pipeline->vb_used = 0;
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for (uint32_t i = 0; i < vi_info->bindingCount; i++) {
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const VkVertexInputBindingDescription *desc =
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&vi_info->pVertexBindingDescriptions[i];
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pipeline->vb_used |= 1 << desc->binding;
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pipeline->binding_stride[desc->binding] = desc->strideInBytes;
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/* Step rate is programmed per vertex element (attribute), not
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* binding. Set up a map of which bindings step per instance, for
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* reference by vertex element setup. */
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switch (desc->stepRate) {
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default:
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case VK_VERTEX_INPUT_STEP_RATE_VERTEX:
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pipeline->instancing_enable[desc->binding] = false;
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break;
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case VK_VERTEX_INPUT_STEP_RATE_INSTANCE:
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pipeline->instancing_enable[desc->binding] = true;
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break;
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}
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}
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const VkPipelineInputAssemblyStateCreateInfo *ia_info =
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pCreateInfo->pInputAssemblyState;
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pipeline->primitive_restart = ia_info->primitiveRestartEnable;
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pipeline->topology = vk_to_gen_primitive_type[ia_info->topology];
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if (extra && extra->use_rectlist)
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pipeline->topology = _3DPRIM_RECTLIST;
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return VK_SUCCESS;
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}
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VkResult
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VkResult
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anv_graphics_pipeline_create(
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anv_graphics_pipeline_create(
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VkDevice _device,
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VkDevice _device,
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@@ -858,12 +858,19 @@ struct anv_pipeline {
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uint32_t vs_simd8;
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uint32_t vs_simd8;
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uint32_t ps_simd8;
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uint32_t ps_simd8;
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uint32_t ps_simd16;
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uint32_t ps_simd16;
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uint32_t ps_ksp0;
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uint32_t ps_ksp2;
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uint32_t ps_grf_start0;
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uint32_t ps_grf_start2;
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uint32_t gs_vec4;
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uint32_t gs_vec4;
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uint32_t gs_vertex_count;
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uint32_t gs_vertex_count;
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uint32_t cs_simd;
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uint32_t cs_simd;
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uint32_t vb_used;
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uint32_t vb_used;
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uint32_t binding_stride[MAX_VBS];
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uint32_t binding_stride[MAX_VBS];
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bool instancing_enable[MAX_VBS];
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bool primitive_restart;
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uint32_t topology;
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uint32_t cs_thread_width_max;
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uint32_t cs_thread_width_max;
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uint32_t cs_right_mask;
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uint32_t cs_right_mask;
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@@ -884,12 +891,23 @@ struct anv_graphics_pipeline_create_info {
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bool use_rectlist;
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bool use_rectlist;
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};
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};
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VkResult
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anv_pipeline_init(struct anv_pipeline *pipeline, struct anv_device *device,
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const VkGraphicsPipelineCreateInfo *pCreateInfo,
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const struct anv_graphics_pipeline_create_info *extra);
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VkResult
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VkResult
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anv_graphics_pipeline_create(VkDevice device,
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anv_graphics_pipeline_create(VkDevice device,
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const VkGraphicsPipelineCreateInfo *pCreateInfo,
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const VkGraphicsPipelineCreateInfo *pCreateInfo,
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const struct anv_graphics_pipeline_create_info *extra,
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const struct anv_graphics_pipeline_create_info *extra,
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VkPipeline *pPipeline);
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VkPipeline *pPipeline);
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VkResult
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gen7_graphics_pipeline_create(VkDevice _device,
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const VkGraphicsPipelineCreateInfo *pCreateInfo,
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const struct anv_graphics_pipeline_create_info *extra,
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VkPipeline *pPipeline);
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VkResult
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VkResult
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gen8_graphics_pipeline_create(VkDevice _device,
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gen8_graphics_pipeline_create(VkDevice _device,
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const VkGraphicsPipelineCreateInfo *pCreateInfo,
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const VkGraphicsPipelineCreateInfo *pCreateInfo,
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@@ -35,29 +35,6 @@ emit_vertex_input(struct anv_pipeline *pipeline,
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{
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{
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const uint32_t num_dwords = 1 + info->attributeCount * 2;
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const uint32_t num_dwords = 1 + info->attributeCount * 2;
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uint32_t *p;
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uint32_t *p;
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bool instancing_enable[32];
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pipeline->vb_used = 0;
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for (uint32_t i = 0; i < info->bindingCount; i++) {
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const VkVertexInputBindingDescription *desc =
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&info->pVertexBindingDescriptions[i];
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pipeline->vb_used |= 1 << desc->binding;
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pipeline->binding_stride[desc->binding] = desc->strideInBytes;
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/* Step rate is programmed per vertex element (attribute), not
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* binding. Set up a map of which bindings step per instance, for
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* reference by vertex element setup. */
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switch (desc->stepRate) {
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default:
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case VK_VERTEX_INPUT_STEP_RATE_VERTEX:
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instancing_enable[desc->binding] = false;
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break;
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case VK_VERTEX_INPUT_STEP_RATE_INSTANCE:
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instancing_enable[desc->binding] = true;
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break;
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}
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}
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p = anv_batch_emitn(&pipeline->batch, num_dwords,
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p = anv_batch_emitn(&pipeline->batch, num_dwords,
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GEN8_3DSTATE_VERTEX_ELEMENTS);
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GEN8_3DSTATE_VERTEX_ELEMENTS);
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@@ -81,7 +58,7 @@ emit_vertex_input(struct anv_pipeline *pipeline,
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GEN8_VERTEX_ELEMENT_STATE_pack(NULL, &p[1 + i * 2], &element);
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GEN8_VERTEX_ELEMENT_STATE_pack(NULL, &p[1 + i * 2], &element);
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anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_VF_INSTANCING,
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anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_VF_INSTANCING,
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.InstancingEnable = instancing_enable[desc->binding],
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.InstancingEnable = pipeline->instancing_enable[desc->binding],
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.VertexElementIndex = i,
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.VertexElementIndex = i,
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/* Vulkan so far doesn't have an instance divisor, so
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/* Vulkan so far doesn't have an instance divisor, so
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* this is always 1 (ignored if not instancing). */
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* this is always 1 (ignored if not instancing). */
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@@ -102,32 +79,14 @@ emit_ia_state(struct anv_pipeline *pipeline,
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const VkPipelineInputAssemblyStateCreateInfo *info,
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const VkPipelineInputAssemblyStateCreateInfo *info,
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const struct anv_graphics_pipeline_create_info *extra)
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const struct anv_graphics_pipeline_create_info *extra)
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{
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{
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static const uint32_t vk_to_gen_primitive_type[] = {
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[VK_PRIMITIVE_TOPOLOGY_POINT_LIST] = _3DPRIM_POINTLIST,
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[VK_PRIMITIVE_TOPOLOGY_LINE_LIST] = _3DPRIM_LINELIST,
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[VK_PRIMITIVE_TOPOLOGY_LINE_STRIP] = _3DPRIM_LINESTRIP,
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[VK_PRIMITIVE_TOPOLOGY_TRIANGLE_LIST] = _3DPRIM_TRILIST,
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[VK_PRIMITIVE_TOPOLOGY_TRIANGLE_STRIP] = _3DPRIM_TRISTRIP,
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[VK_PRIMITIVE_TOPOLOGY_TRIANGLE_FAN] = _3DPRIM_TRIFAN,
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[VK_PRIMITIVE_TOPOLOGY_LINE_LIST_ADJ] = _3DPRIM_LINELIST_ADJ,
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[VK_PRIMITIVE_TOPOLOGY_LINE_STRIP_ADJ] = _3DPRIM_LINESTRIP_ADJ,
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[VK_PRIMITIVE_TOPOLOGY_TRIANGLE_LIST_ADJ] = _3DPRIM_TRILIST_ADJ,
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[VK_PRIMITIVE_TOPOLOGY_TRIANGLE_STRIP_ADJ] = _3DPRIM_TRISTRIP_ADJ,
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[VK_PRIMITIVE_TOPOLOGY_PATCH] = _3DPRIM_PATCHLIST_1
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};
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uint32_t topology = vk_to_gen_primitive_type[info->topology];
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if (extra && extra->use_rectlist)
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topology = _3DPRIM_RECTLIST;
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struct GEN8_3DSTATE_VF vf = {
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struct GEN8_3DSTATE_VF vf = {
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GEN8_3DSTATE_VF_header,
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GEN8_3DSTATE_VF_header,
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.IndexedDrawCutIndexEnable = info->primitiveRestartEnable,
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.IndexedDrawCutIndexEnable = pipeline->primitive_restart
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};
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};
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GEN8_3DSTATE_VF_pack(NULL, pipeline->gen8.vf, &vf);
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GEN8_3DSTATE_VF_pack(NULL, pipeline->gen8.vf, &vf);
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anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_VF_TOPOLOGY,
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anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_VF_TOPOLOGY,
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.PrimitiveTopologyType = topology);
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.PrimitiveTopologyType = pipeline->topology);
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}
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}
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static void
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static void
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@@ -356,6 +315,10 @@ gen8_graphics_pipeline_create(
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if (pipeline == NULL)
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if (pipeline == NULL)
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return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
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return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
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result = anv_pipeline_init(pipeline, device, pCreateInfo, extra);
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if (result != VK_SUCCESS)
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return result;
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pipeline->device = device;
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pipeline->device = device;
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pipeline->layout = anv_pipeline_layout_from_handle(pCreateInfo->layout);
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pipeline->layout = anv_pipeline_layout_from_handle(pCreateInfo->layout);
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memset(pipeline->shaders, 0, sizeof(pipeline->shaders));
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memset(pipeline->shaders, 0, sizeof(pipeline->shaders));
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@@ -564,26 +527,9 @@ gen8_graphics_pipeline_create(
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.UserClipDistanceCullTestEnableBitmask = 0);
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.UserClipDistanceCullTestEnableBitmask = 0);
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const struct brw_wm_prog_data *wm_prog_data = &pipeline->wm_prog_data;
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const struct brw_wm_prog_data *wm_prog_data = &pipeline->wm_prog_data;
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uint32_t ksp0, ksp2, grf_start0, grf_start2;
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ksp2 = 0;
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grf_start2 = 0;
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if (pipeline->ps_simd8 != NO_KERNEL) {
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ksp0 = pipeline->ps_simd8;
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grf_start0 = wm_prog_data->base.dispatch_grf_start_reg;
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if (pipeline->ps_simd16 != NO_KERNEL) {
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ksp2 = pipeline->ps_simd16;
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grf_start2 = wm_prog_data->dispatch_grf_start_reg_16;
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}
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} else if (pipeline->ps_simd16 != NO_KERNEL) {
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ksp0 = pipeline->ps_simd16;
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grf_start0 = wm_prog_data->dispatch_grf_start_reg_16;
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} else {
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unreachable("no ps shader");
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}
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anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_PS,
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anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_PS,
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.KernelStartPointer0 = ksp0,
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.KernelStartPointer0 = pipeline->ps_ksp0,
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.SingleProgramFlow = false,
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.SingleProgramFlow = false,
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.VectorMaskEnable = true,
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.VectorMaskEnable = true,
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@@ -600,12 +546,12 @@ gen8_graphics_pipeline_create(
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._16PixelDispatchEnable = pipeline->ps_simd16 != NO_KERNEL,
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._16PixelDispatchEnable = pipeline->ps_simd16 != NO_KERNEL,
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._32PixelDispatchEnable = false,
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._32PixelDispatchEnable = false,
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.DispatchGRFStartRegisterForConstantSetupData0 = grf_start0,
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.DispatchGRFStartRegisterForConstantSetupData0 = pipeline->ps_grf_start0,
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.DispatchGRFStartRegisterForConstantSetupData1 = 0,
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.DispatchGRFStartRegisterForConstantSetupData1 = 0,
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.DispatchGRFStartRegisterForConstantSetupData2 = grf_start2,
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.DispatchGRFStartRegisterForConstantSetupData2 = pipeline->ps_grf_start2,
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.KernelStartPointer1 = 0,
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.KernelStartPointer1 = 0,
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.KernelStartPointer2 = ksp2);
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.KernelStartPointer2 = pipeline->ps_ksp2);
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bool per_sample_ps = false;
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bool per_sample_ps = false;
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anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_PS_EXTRA,
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anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_PS_EXTRA,
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