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intel/fs/validate: Assert SEND [extended] descriptors are uniform

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This is required by code-gen since it generates a 1-wide OR and it'll
blow up if the register width > 1.  It's also way better than the "your
register is the wrong size" assert you get from the more generic
validation check.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21094>
This commit is contained in:
Jason Ekstrand
2021-11-23 12:48:27 -06:00
committed by Marge Bot
parent 949b42c4dc
commit 9c658b1fc8
2 changed files with 12 additions and 1 deletions
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12
src/intel/compiler/brw_fs_validate.cpp
View File

@@ -87,7 +87,8 @@ fs_visitor::validate()
{ {
#ifndef NDEBUG #ifndef NDEBUG
foreach_block_and_inst (block, fs_inst, inst, cfg) { foreach_block_and_inst (block, fs_inst, inst, cfg) {
if (inst->opcode == SHADER_OPCODE_URB_WRITE_LOGICAL) { switch (inst->opcode) {
case SHADER_OPCODE_URB_WRITE_LOGICAL: {
const unsigned header_size = 1 + const unsigned header_size = 1 +
unsigned(inst->src[URB_LOGICAL_SRC_PER_SLOT_OFFSETS].file != BAD_FILE) + unsigned(inst->src[URB_LOGICAL_SRC_PER_SLOT_OFFSETS].file != BAD_FILE) +
unsigned(inst->src[URB_LOGICAL_SRC_CHANNEL_MASK].file != BAD_FILE); unsigned(inst->src[URB_LOGICAL_SRC_CHANNEL_MASK].file != BAD_FILE);
@@ -99,6 +100,15 @@ fs_visitor::validate()
} }
fsv_assert_eq(header_size + data_size, inst->mlen); fsv_assert_eq(header_size + data_size, inst->mlen);
break;
}
case SHADER_OPCODE_SEND:
fsv_assert(is_uniform(inst->src[0]) && is_uniform(inst->src[1]));
break;
default:
break;
} }
if (inst->is_3src(compiler)) { if (inst->is_3src(compiler)) {

1
src/intel/compiler/brw_lower_logical_sends.cpp
View File

@@ -370,6 +370,7 @@ lower_fb_write_logical_send(const fs_builder &bld, fs_inst *inst,
desc = ubld.vgrf(BRW_REGISTER_TYPE_UD); desc = ubld.vgrf(BRW_REGISTER_TYPE_UD);
ubld.AND(desc, dynamic_msaa_flags(prog_data), ubld.AND(desc, dynamic_msaa_flags(prog_data),
brw_imm_ud(BRW_WM_MSAA_FLAG_COARSE_DISPATCH)); brw_imm_ud(BRW_WM_MSAA_FLAG_COARSE_DISPATCH));
desc = component(desc, 0);
} }
uint32_t ex_desc = 0; uint32_t ex_desc = 0;