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intel/compiler: drop glsl options from brw_compiler

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Only the nir options are used now, since i965 was dropped,
the glsl options come from the state tracker

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14102>
This commit is contained in:
Dave Airlie
2021-12-07 15:53:49 +10:00
committed by Marge Bot
parent de33205f88
commit 9bb375b0be
10 changed files with 17 additions and 33 deletions
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18
src/intel/compiler/brw_compiler.c
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@@ -156,21 +156,9 @@ brw_compiler_create(void *mem_ctx, const struct intel_device_info *devinfo)
/* We want the GLSL compiler to emit code that uses condition codes */
for (int i = 0; i < MESA_ALL_SHADER_STAGES; i++) {
compiler->glsl_compiler_options[i].MaxUnrollIterations = 0;
compiler->glsl_compiler_options[i].MaxIfDepth =
devinfo->ver < 6 ? 16 : UINT_MAX;
/* We handle this in NIR */
compiler->glsl_compiler_options[i].EmitNoIndirectInput = false;
compiler->glsl_compiler_options[i].EmitNoIndirectOutput = false;
compiler->glsl_compiler_options[i].EmitNoIndirectUniform = false;
compiler->glsl_compiler_options[i].EmitNoIndirectTemp = false;
bool is_scalar = compiler->scalar_stage[i];
compiler->glsl_compiler_options[i].OptimizeForAOS = !is_scalar;
struct nir_shader_compiler_options *nir_options =
rzalloc(compiler, struct nir_shader_compiler_options);
bool is_scalar = compiler->scalar_stage[i];
if (is_scalar) {
*nir_options = scalar_nir_options;
} else {
@@ -201,9 +189,7 @@ brw_compiler_create(void *mem_ctx, const struct intel_device_info *devinfo)
nir_options->force_indirect_unrolling |=
brw_nir_no_indirect_mask(compiler, i);
compiler->glsl_compiler_options[i].NirOptions = nir_options;
compiler->glsl_compiler_options[i].ClampBlockIndicesToArrayBounds = true;
compiler->nir_options[i] = nir_options;
}
return compiler;