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radeonsi: emit cache flushes before draw registers

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This fixes #9807 but I don't understand why.

Emitting cache flushes before VGT_PRIMITIVE_TYPE is what makes
the problem go away but changing the order in si_draw() is clearer.

The only cases where sctx->flags is modified in si_emit_draw_registers
is handled using si_emit_cache_flush_direct so we can move cache
flushing up without any addtional conditionals.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9807
Fixes: 1e4b539042 ("radeonsi: handle deferred cache flushes as a state (si_atom)")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27095>
(cherry picked from commit 0e16da89fe)
This commit is contained in:
Pierre-Eric Pelloux-Prayer
2024-01-15 22:17:49 +01:00
committed by Eric Engestrom
parent 28f92ab484
commit 9aaf3de90c
2 changed files with 9 additions and 6 deletions
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13
src/gallium/drivers/radeonsi/si_state_draw.cpp
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@@ -882,8 +882,10 @@ static unsigned si_get_ia_multi_vgt_param(struct si_context *sctx,
sctx->family == CHIP_HAWAII && G_028AA8_SWITCH_ON_EOI(ia_multi_vgt_param) &&
num_instanced_prims_less_than<IS_DRAW_VERTEX_STATE>(indirect, prim, min_vertex_count,
instance_count, 2, sctx->patch_vertices)) {
sctx->flags |= SI_CONTEXT_VGT_FLUSH;
si_mark_atom_dirty(sctx, &sctx->atoms.s.cache_flush);
/* The cache flushes should have been emitted already. */
assert(sctx->flags == 0);
sctx->flags = SI_CONTEXT_VGT_FLUSH;
si_emit_cache_flush_direct(sctx);
}
}
@@ -2237,12 +2239,13 @@ static void si_draw(struct pipe_context *ctx,
/* Emit states. */
si_emit_rasterizer_prim_state<GFX_VERSION, HAS_GS, NGG>(sctx);
/* This must be done before si_emit_all_states because it can set cache flush flags. */
/* This emits states and flushes caches. */
si_emit_all_states(sctx, masked_atoms);
/* This can be done after si_emit_all_states because it doesn't set cache flush flags. */
si_emit_draw_registers<GFX_VERSION, HAS_TESS, HAS_GS, NGG, IS_DRAW_VERTEX_STATE>
(sctx, indirect, prim, index_size, instance_count, primitive_restart,
info->restart_index, min_direct_count);
/* This emits states and flushes caches. */
si_emit_all_states(sctx, masked_atoms);
/* <-- CUs are idle here if the cache_flush state waited. */
/* This must be done after si_emit_all_states, which can affect this. */