intel: Add intel_gem_count_engines
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com> Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12692>
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@@ -55,3 +55,16 @@ intel_gem_supports_syncobj_wait(int fd)
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*/
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*/
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return ret == -1 && errno == ETIME;
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return ret == -1 && errno == ETIME;
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}
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}
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int
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intel_gem_count_engines(const struct drm_i915_query_engine_info *info,
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enum drm_i915_gem_engine_class engine_class)
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{
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assert(info != NULL);
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int count = 0;
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for (int i = 0; i < info->num_engines; i++) {
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if (info->engines[i].engine.engine_class == engine_class)
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count++;
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}
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return count;
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}
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@@ -146,4 +146,7 @@ intel_i915_query_alloc(int fd, uint64_t query_id)
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bool intel_gem_supports_syncobj_wait(int fd);
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bool intel_gem_supports_syncobj_wait(int fd);
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int intel_gem_count_engines(const struct drm_i915_query_engine_info *info,
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enum drm_i915_gem_engine_class engine_class);
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#endif /* INTEL_GEM_H */
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#endif /* INTEL_GEM_H */
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@@ -697,7 +697,8 @@ anv_physical_device_init_queue_families(struct anv_physical_device *pdevice)
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if (pdevice->engine_info) {
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if (pdevice->engine_info) {
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int gc_count =
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int gc_count =
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anv_gem_count_engines(pdevice->engine_info, I915_ENGINE_CLASS_RENDER);
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intel_gem_count_engines(pdevice->engine_info,
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I915_ENGINE_CLASS_RENDER);
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int g_count = 0;
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int g_count = 0;
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int c_count = 0;
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int c_count = 0;
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@@ -360,7 +360,7 @@ anv_gem_create_context_engines(struct anv_device *device,
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int i915_engine_counts[] = {
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int i915_engine_counts[] = {
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[I915_ENGINE_CLASS_RENDER] =
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[I915_ENGINE_CLASS_RENDER] =
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anv_gem_count_engines(info, I915_ENGINE_CLASS_RENDER),
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intel_gem_count_engines(info, I915_ENGINE_CLASS_RENDER),
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};
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};
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/* For each queue, we look for the next instance that matches the class we
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/* For each queue, we look for the next instance that matches the class we
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@@ -526,15 +526,3 @@ anv_gem_get_engine_info(int fd)
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{
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{
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return intel_i915_query_alloc(fd, DRM_I915_QUERY_ENGINE_INFO);
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return intel_i915_query_alloc(fd, DRM_I915_QUERY_ENGINE_INFO);
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}
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}
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int
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anv_gem_count_engines(const struct drm_i915_query_engine_info *info,
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uint16_t engine_class)
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{
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int count = 0;
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for (int i = 0; i < info->num_engines; i++) {
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if (info->engines[i].engine.engine_class == engine_class)
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count++;
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}
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return count;
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}
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@@ -208,13 +208,6 @@ anv_gem_get_engine_info(int fd)
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unreachable("Unused");
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unreachable("Unused");
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}
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}
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int
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anv_gem_count_engines(const struct drm_i915_query_engine_info *info,
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uint16_t engine_class)
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{
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unreachable("Unused");
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}
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int
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int
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anv_gem_reg_read(int fd, uint32_t offset, uint64_t *result)
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anv_gem_reg_read(int fd, uint32_t offset, uint64_t *result)
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{
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{
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@@ -1388,8 +1388,6 @@ int anv_gem_set_domain(struct anv_device *device, uint32_t gem_handle,
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int anv_i915_query(int fd, uint64_t query_id, void *buffer,
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int anv_i915_query(int fd, uint64_t query_id, void *buffer,
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int32_t *buffer_len);
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int32_t *buffer_len);
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struct drm_i915_query_engine_info *anv_gem_get_engine_info(int fd);
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struct drm_i915_query_engine_info *anv_gem_get_engine_info(int fd);
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int anv_gem_count_engines(const struct drm_i915_query_engine_info *info,
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uint16_t engine_class);
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uint64_t anv_vma_alloc(struct anv_device *device,
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uint64_t anv_vma_alloc(struct anv_device *device,
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uint64_t size, uint64_t align,
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uint64_t size, uint64_t align,
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