diff --git a/.pick_status.json b/.pick_status.json
index 5588aa1f247..c894aa86a25 100644
--- a/.pick_status.json
+++ b/.pick_status.json
@@ -64,7 +64,7 @@
         "description": "iris: Emit STATE_SYSTEM_MEM_FENCE_ADDRESS",
         "nominated": true,
         "nomination_type": 2,
-        "resolution": 0,
+        "resolution": 1,
         "main_sha": null,
         "because_sha": "86813c60a49899544239574d0da3de1de9d9088d",
         "notes": null
diff --git a/src/gallium/drivers/iris/iris_bufmgr.c b/src/gallium/drivers/iris/iris_bufmgr.c
index 022fff9f1da..c194de74618 100644
--- a/src/gallium/drivers/iris/iris_bufmgr.c
+++ b/src/gallium/drivers/iris/iris_bufmgr.c
@@ -242,6 +242,7 @@ struct iris_bufmgr {
    struct iris_border_color_pool border_color_pool;
 
    struct iris_bo *dummy_aux_bo;
+   struct iris_bo *mem_fence_bo;
 };
 
 static simple_mtx_t global_bufmgr_list_mutex = SIMPLE_MTX_INITIALIZER;
@@ -1835,6 +1836,7 @@ static void
 iris_bufmgr_destroy(struct iris_bufmgr *bufmgr)
 {
    iris_bo_unreference(bufmgr->dummy_aux_bo);
+   iris_bo_unreference(bufmgr->mem_fence_bo);
 
    iris_destroy_border_color_pool(&bufmgr->border_color_pool);
 
@@ -2469,12 +2471,28 @@ iris_bufmgr_create(struct intel_device_info *devinfo, int fd, bool bo_reuse)
       bufmgr->dummy_aux_bo = iris_bo_alloc(bufmgr, "dummy_aux", 4096, 4096,
                                            IRIS_MEMZONE_OTHER, BO_ALLOC_PLAIN);
          if (!bufmgr->dummy_aux_bo)
-            goto error_dummy_aux;
+            goto error_alloc_bo;
+   }
+
+   /* Programming note from MI_MEM_FENCE specification:
+    *
+    *    Software must ensure STATE_SYSTEM_MEM_FENCE_ADDRESS command is
+    *    programmed prior to programming this command.
+    *
+    * HAS 1607240579 then provides the size information: 4K
+    */
+   if (devinfo->verx10 >= 200) {
+      bufmgr->mem_fence_bo = iris_bo_alloc(bufmgr, "mem_fence", 4096, 4096,
+                                           IRIS_MEMZONE_OTHER, BO_ALLOC_SMEM);
+         if (!bufmgr->dummy_aux_bo)
+            goto error_alloc_bo;
    }
 
    return bufmgr;
 
-error_dummy_aux:
+error_alloc_bo:
+   iris_bo_unreference(bufmgr->dummy_aux_bo);
+   iris_bo_unreference(bufmgr->mem_fence_bo);
    iris_destroy_border_color_pool(&bufmgr->border_color_pool);
    intel_aux_map_finish(bufmgr->aux_map_ctx);
    _mesa_hash_table_destroy(bufmgr->handle_table, NULL);
@@ -2669,3 +2687,9 @@ iris_bufmgr_get_dummy_aux_address(struct iris_bufmgr *bufmgr)
 {
    return bufmgr->dummy_aux_bo ? bufmgr->dummy_aux_bo->address : 0;
 }
+
+struct iris_bo *
+iris_bufmgr_get_mem_fence_bo(struct iris_bufmgr *bufmgr)
+{
+   return bufmgr->mem_fence_bo;
+}
diff --git a/src/gallium/drivers/iris/iris_bufmgr.h b/src/gallium/drivers/iris/iris_bufmgr.h
index ab4237033ce..352756a2daa 100644
--- a/src/gallium/drivers/iris/iris_bufmgr.h
+++ b/src/gallium/drivers/iris/iris_bufmgr.h
@@ -665,6 +665,7 @@ bool iris_bufmgr_use_global_vm_id(struct iris_bufmgr *bufmgr);
 struct intel_bind_timeline *iris_bufmgr_get_bind_timeline(struct iris_bufmgr *bufmgr);
 bool iris_bufmgr_compute_engine_supported(struct iris_bufmgr *bufmgr);
 uint64_t iris_bufmgr_get_dummy_aux_address(struct iris_bufmgr *bufmgr);
+struct iris_bo *iris_bufmgr_get_mem_fence_bo(struct iris_bufmgr *bufmgr);
 
 enum iris_madvice {
    IRIS_MADVICE_WILL_NEED = 0,
diff --git a/src/gallium/drivers/iris/iris_state.c b/src/gallium/drivers/iris/iris_state.c
index 17aaba3c612..ae7b1fb1805 100644
--- a/src/gallium/drivers/iris/iris_state.c
+++ b/src/gallium/drivers/iris/iris_state.c
@@ -1148,6 +1148,18 @@ iris_disable_rhwo_optimization(struct iris_batch *batch, bool disable)
 #endif
 }
 
+static void
+state_system_mem_fence_address_emit(struct iris_batch *batch)
+{
+#if GFX_VERx10 >= 200
+   struct iris_screen *screen = batch->screen;
+   struct iris_address addr = { .bo = iris_bufmgr_get_mem_fence_bo(screen->bufmgr) };
+   iris_emit_cmd(batch, GENX(STATE_SYSTEM_MEM_FENCE_ADDRESS), mem_fence_addr) {
+      mem_fence_addr.SystemMemoryFenceAddress = addr;
+   }
+#endif
+}
+
 /**
  * Upload initial GPU state for any kind of context.
  *
@@ -1196,6 +1208,8 @@ iris_init_common_context(struct iris_batch *batch)
       reg.CrossTilePartialWriteMergeEnable = true;
    }
 #endif
+
+   state_system_mem_fence_address_emit(batch);
 }
 
 static void
@@ -1543,6 +1557,8 @@ iris_init_copy_context(struct iris_batch *batch)
    init_aux_map_state(batch);
 #endif
 
+   state_system_mem_fence_address_emit(batch);
+
    iris_batch_sync_region_end(batch);
 }