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winsys/amdgpu: rework the VM alignment optimizations

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- don't increase the alignment past 2 MB
- apply the second tweak to older chips too

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7055>
This commit is contained in:
Marek Olšák
2020-10-05 01:05:44 -04:00
committed by Marge Bot
parent a4e4644eff
commit 99446b8cee
1 changed files with 8 additions and 13 deletions
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21
src/gallium/winsys/amdgpu/drm/amdgpu_bo.c
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@@ -446,22 +446,17 @@ static void amdgpu_add_buffer_to_global_list(struct amdgpu_winsys_bo *bo)
static uint64_t amdgpu_get_optimal_vm_alignment(struct amdgpu_winsys *ws, static uint64_t amdgpu_get_optimal_vm_alignment(struct amdgpu_winsys *ws,
uint64_t size, unsigned alignment) uint64_t size, unsigned alignment)
{ {
uint64_t vm_alignment = alignment; /* Increase the alignment for faster address translation and better memory
* access pattern.
/* Increase the VM alignment for faster address translation. */
if (size >= ws->info.pte_fragment_size)
vm_alignment = MAX2(vm_alignment, ws->info.pte_fragment_size);
/* Gfx9: Increase the VM alignment to the most significant bit set
* in the size for faster address translation.
*/ */
if (ws->info.chip_class >= GFX9) { if (size >= ws->info.pte_fragment_size) {
unsigned msb = util_last_bit64(size); /* 0 = no bit is set */ alignment = MAX2(alignment, ws->info.pte_fragment_size);
uint64_t msb_alignment = msb ? 1ull << (msb - 1) : 0; } else if (size) {
unsigned msb = util_last_bit(size);
vm_alignment = MAX2(vm_alignment, msb_alignment); alignment = MAX2(alignment, 1u << (msb - 1));
} }
return vm_alignment; return alignment;
} }
static struct amdgpu_winsys_bo *amdgpu_create_bo(struct amdgpu_winsys *ws, static struct amdgpu_winsys_bo *amdgpu_create_bo(struct amdgpu_winsys *ws,