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anv/hasvk: track robustness per pipeline stage

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And split them into UBO and SSBO

v2 (Lionel):
 - Get rid of robustness fields in anv_shader_bin
v3 (Lionel):
 - Do not pass unused parameters around

Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17545>
This commit is contained in:
Lionel Landwerlin
2022-06-21 18:06:04 -07:00
parent c4ec60e87d
commit 9934613c74
19 changed files with 252 additions and 228 deletions
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6
src/intel/compiler/brw_fs.cpp
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@@ -7732,7 +7732,7 @@ brw_compile_fs(const struct brw_compiler *compiler,
NIR_PASS(_, nir, brw_nir_move_interpolation_to_top);
brw_postprocess_nir(nir, compiler, debug_enabled,
key->base.robust_buffer_access);
key->base.robust_flags);
brw_nir_populate_wm_prog_data(nir, compiler->devinfo, key, prog_data,
params->mue_map);
@@ -8094,7 +8094,7 @@ brw_compile_cs(const struct brw_compiler *compiler,
NIR_PASS(_, shader, nir_opt_dce);
brw_postprocess_nir(shader, compiler, debug_enabled,
key->base.robust_buffer_access);
key->base.robust_flags);
v[simd] = std::make_unique<fs_visitor>(compiler, &params->base,
&key->base,
@@ -8217,7 +8217,7 @@ compile_single_bs(const struct brw_compiler *compiler,
const unsigned max_dispatch_width = 16;
brw_nir_apply_key(shader, compiler, &key->base, max_dispatch_width);
brw_postprocess_nir(shader, compiler, debug_enabled,
key->base.robust_buffer_access);
key->base.robust_flags);
brw_simd_selection_state simd_state{
.mem_ctx = params->base.mem_ctx,