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anv/hasvk: track robustness per pipeline stage

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And split them into UBO and SSBO

v2 (Lionel):
 - Get rid of robustness fields in anv_shader_bin
v3 (Lionel):
 - Do not pass unused parameters around

Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17545>
This commit is contained in:
Lionel Landwerlin
2022-06-21 18:06:04 -07:00
parent c4ec60e87d
commit 9934613c74
19 changed files with 252 additions and 228 deletions
Download Patch File Download Diff File Expand all files Collapse all files

10
src/intel/compiler/brw_compiler.h
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@@ -237,10 +237,17 @@ struct brw_sampler_prog_key_data {
enum gfx6_gather_sampler_wa gfx6_gather_wa[BRW_MAX_SAMPLERS];
};
enum brw_robustness_flags {
BRW_ROBUSTNESS_UBO = BITFIELD_BIT(0),
BRW_ROBUSTNESS_SSBO = BITFIELD_BIT(1),
};
struct brw_base_prog_key {
unsigned program_string_id;
bool robust_buffer_access;
enum brw_robustness_flags robust_flags:2;
unsigned padding:22;
/**
* Apply workarounds for SIN and COS input range problems.
@@ -248,7 +255,6 @@ struct brw_base_prog_key {
* avoid precision issues.
*/
bool limit_trig_input_range;
unsigned padding:16;
struct brw_sampler_prog_key_data tex;
};

6
src/intel/compiler/brw_fs.cpp
View File

@@ -7732,7 +7732,7 @@ brw_compile_fs(const struct brw_compiler *compiler,
NIR_PASS(_, nir, brw_nir_move_interpolation_to_top);
brw_postprocess_nir(nir, compiler, debug_enabled,
key->base.robust_buffer_access);
key->base.robust_flags);
brw_nir_populate_wm_prog_data(nir, compiler->devinfo, key, prog_data,
params->mue_map);
@@ -8094,7 +8094,7 @@ brw_compile_cs(const struct brw_compiler *compiler,
NIR_PASS(_, shader, nir_opt_dce);
brw_postprocess_nir(shader, compiler, debug_enabled,
key->base.robust_buffer_access);
key->base.robust_flags);
v[simd] = std::make_unique<fs_visitor>(compiler, &params->base,
&key->base,
@@ -8217,7 +8217,7 @@ compile_single_bs(const struct brw_compiler *compiler,
const unsigned max_dispatch_width = 16;
brw_nir_apply_key(shader, compiler, &key->base, max_dispatch_width);
brw_postprocess_nir(shader, compiler, debug_enabled,
key->base.robust_buffer_access);
key->base.robust_flags);
brw_simd_selection_state simd_state{
.mem_ctx = params->base.mem_ctx,

4
src/intel/compiler/brw_mesh.cpp
View File

@@ -328,7 +328,7 @@ brw_compile_task(const struct brw_compiler *compiler,
NIR_PASS(_, shader, brw_nir_lower_simd, dispatch_width);
brw_postprocess_nir(shader, compiler, debug_enabled,
key->base.robust_buffer_access);
key->base.robust_flags);
v[simd] = std::make_unique<fs_visitor>(compiler, &params->base,
&key->base,
@@ -1488,7 +1488,7 @@ brw_compile_mesh(const struct brw_compiler *compiler,
NIR_PASS(_, shader, brw_nir_lower_simd, dispatch_width);
brw_postprocess_nir(shader, compiler, debug_enabled,
key->base.robust_buffer_access);
key->base.robust_flags);
v[simd] = std::make_unique<fs_visitor>(compiler, &params->base,
&key->base,

14
src/intel/compiler/brw_nir.c
View File

@@ -1458,7 +1458,7 @@ get_mem_access_size_align(nir_intrinsic_op intrin, uint8_t bytes,
static void
brw_vectorize_lower_mem_access(nir_shader *nir,
const struct brw_compiler *compiler,
bool robust_buffer_access)
enum brw_robustness_flags robust_flags)
{
bool progress = false;
const bool is_scalar = compiler->scalar_stage[nir->info.stage];
@@ -1472,10 +1472,10 @@ brw_vectorize_lower_mem_access(nir_shader *nir,
.robust_modes = (nir_variable_mode)0,
};
if (robust_buffer_access) {
options.robust_modes = nir_var_mem_ubo | nir_var_mem_ssbo |
nir_var_mem_global;
}
if (robust_flags & BRW_ROBUSTNESS_UBO)
options.robust_modes |= nir_var_mem_ubo | nir_var_mem_global;
if (robust_flags & BRW_ROBUSTNESS_SSBO)
options.robust_modes |= nir_var_mem_ssbo | nir_var_mem_global;
OPT(nir_opt_load_store_vectorize, &options);
@@ -1550,7 +1550,7 @@ nir_shader_has_local_variables(const nir_shader *nir)
void
brw_postprocess_nir(nir_shader *nir, const struct brw_compiler *compiler,
bool debug_enabled,
bool robust_buffer_access)
enum brw_robustness_flags robust_flags)
{
const struct intel_device_info *devinfo = compiler->devinfo;
const bool is_scalar = compiler->scalar_stage[nir->info.stage];
@@ -1590,7 +1590,7 @@ brw_postprocess_nir(nir_shader *nir, const struct brw_compiler *compiler,
brw_nir_optimize(nir, compiler);
}
brw_vectorize_lower_mem_access(nir, compiler, robust_buffer_access);
brw_vectorize_lower_mem_access(nir, compiler, robust_flags);
if (OPT(nir_lower_int64))
brw_nir_optimize(nir, compiler);

2
src/intel/compiler/brw_nir.h
View File

@@ -216,7 +216,7 @@ bool brw_nir_cleanup_resource_intel(nir_shader *shader);
void brw_postprocess_nir(nir_shader *nir,
const struct brw_compiler *compiler,
bool debug_enabled,
bool robust_buffer_access);
enum brw_robustness_flags robust_flags);
bool brw_nir_clamp_image_1d_2d_array_sizes(nir_shader *shader);

2
src/intel/compiler/brw_shader.cpp
View File

@@ -1316,7 +1316,7 @@ brw_compile_tes(const struct brw_compiler *compiler,
brw_nir_lower_tes_inputs(nir, input_vue_map);
brw_nir_lower_vue_outputs(nir);
brw_postprocess_nir(nir, compiler, debug_enabled,
key->base.robust_buffer_access);
key->base.robust_flags);
brw_compute_vue_map(devinfo, &prog_data->base.vue_map,
nir->info.outputs_written,

2
src/intel/compiler/brw_vec4.cpp
View File

@@ -2556,7 +2556,7 @@ brw_compile_vs(const struct brw_compiler *compiler,
brw_nir_lower_vs_inputs(nir, params->edgeflag_is_last, key->gl_attrib_wa_flags);
brw_nir_lower_vue_outputs(nir);
brw_postprocess_nir(nir, compiler, debug_enabled,
key->base.robust_buffer_access);
key->base.robust_flags);
prog_data->base.clip_distance_mask =
((1 << nir->info.clip_distance_array_size) - 1);

2
src/intel/compiler/brw_vec4_gs_visitor.cpp
View File

@@ -616,7 +616,7 @@ brw_compile_gs(const struct brw_compiler *compiler,
brw_nir_lower_vue_inputs(nir, &c.input_vue_map);
brw_nir_lower_vue_outputs(nir);
brw_postprocess_nir(nir, compiler, debug_enabled,
key->base.robust_buffer_access);
key->base.robust_flags);
prog_data->base.clip_distance_mask =
((1 << nir->info.clip_distance_array_size) - 1);

2
src/intel/compiler/brw_vec4_tcs.cpp
View File

@@ -388,7 +388,7 @@ brw_compile_tcs(const struct brw_compiler *compiler,
brw_nir_lower_patch_vertices_in(nir, key->input_vertices);
brw_postprocess_nir(nir, compiler, debug_enabled,
key->base.robust_buffer_access);
key->base.robust_flags);
bool has_primitive_id =
BITSET_TEST(nir->info.system_values_read, SYSTEM_VALUE_PRIMITIVE_ID);