r600: enable lowering uniforms to UBO
Signed-off-by: Gert Wollny <gert.wollny@collabora.com> Reviewed-by: Eric Anholt <eric@anholt.net> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6743>
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@@ -1199,6 +1199,7 @@ const struct nir_shader_compiler_options r600_nir_fs_options = {
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.vectorize_io = true,
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.vectorize_io = true,
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.has_umad24 = true,
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.has_umad24 = true,
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.has_umul24 = true,
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.has_umul24 = true,
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.lower_uniforms_to_ubo = true
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};
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};
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const struct nir_shader_compiler_options r600_nir_options = {
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const struct nir_shader_compiler_options r600_nir_options = {
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@@ -1219,6 +1220,7 @@ const struct nir_shader_compiler_options r600_nir_options = {
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.vectorize_io = true,
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.vectorize_io = true,
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.has_umad24 = true,
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.has_umad24 = true,
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.has_umul24 = true,
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.has_umul24 = true,
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.lower_uniforms_to_ubo = true
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};
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};
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@@ -631,8 +631,6 @@ bool ShaderFromNirProcessor::emit_intrinsic_instruction(nir_intrinsic_instr* ins
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return emit_load_scratch(instr);
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return emit_load_scratch(instr);
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case nir_intrinsic_store_deref:
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case nir_intrinsic_store_deref:
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return emit_store_deref(instr);
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return emit_store_deref(instr);
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case nir_intrinsic_load_uniform:
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return reserve_uniform(instr);
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case nir_intrinsic_discard:
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case nir_intrinsic_discard:
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case nir_intrinsic_discard_if:
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case nir_intrinsic_discard_if:
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return emit_discard_if(instr);
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return emit_discard_if(instr);
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@@ -913,50 +911,6 @@ bool ShaderFromNirProcessor::emit_load_input_deref(const nir_variable *var,
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return do_emit_load_deref(var, instr);
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return do_emit_load_deref(var, instr);
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}
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}
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bool ShaderFromNirProcessor::reserve_uniform(nir_intrinsic_instr* instr)
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{
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r600::sfn_log << SfnLog::instr << __func__ << ": emit '"
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<< *reinterpret_cast<nir_instr*>(instr)
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<< "'\n";
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/* If the target register is a SSA register and the loading is not
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* indirect then we can do lazy loading, i.e. the uniform value can
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* be used directly. Otherwise we have to load the data for real
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* rigt away.
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*/
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/* Try to find the literal that defines the array index */
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const nir_load_const_instr* literal = nullptr;
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if (instr->src[0].is_ssa)
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literal = get_literal_constant(instr->src[0].ssa->index);
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int base = nir_intrinsic_base(instr);
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if (literal) {
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AluInstruction *ir = nullptr;
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for (int i = 0; i < instr->num_components ; ++i) {
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PValue u = PValue(new UniformValue(512 + literal->value[0].u32 + base, i));
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sfn_log << SfnLog::io << "uniform "
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<< instr->dest.ssa.index << " const["<< i << "]: "<< instr->const_index[i] << "\n";
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if (instr->dest.is_ssa)
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load_preloaded_value(instr->dest, i, u);
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else {
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ir = new AluInstruction(op1_mov, from_nir(instr->dest, i),
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u, {alu_write});
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emit_instruction(ir);
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}
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}
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if (ir)
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ir->set_flag(alu_last_instr);
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} else {
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PValue addr = from_nir(instr->src[0], 0, 0);
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return load_uniform_indirect(instr, addr, 16 * base, 0);
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}
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return true;
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}
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bool ShaderFromNirProcessor::load_uniform_indirect(nir_intrinsic_instr* instr, PValue addr, int offest, int bufferid)
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bool ShaderFromNirProcessor::load_uniform_indirect(nir_intrinsic_instr* instr, PValue addr, int offest, int bufferid)
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{
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{
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if (!addr) {
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if (!addr) {
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@@ -161,7 +161,6 @@ private:
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bool emit_store_deref(nir_intrinsic_instr* instr);
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bool emit_store_deref(nir_intrinsic_instr* instr);
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bool reserve_uniform(nir_intrinsic_instr* instr);
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bool process_uniforms(nir_variable *uniform);
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bool process_uniforms(nir_variable *uniform);
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bool process_inputs(nir_variable *input);
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bool process_inputs(nir_variable *input);
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bool process_outputs(nir_variable *output);
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bool process_outputs(nir_variable *output);
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