pvr: Minor refactor of pvr_device.c
Moving a few functions further up here to prepare for the next commit; should make the diffs a lot nicer. No (intentional) functional changes. Signed-off-by: Matt Coster <matt.coster@imgtec.com> Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25326>
This commit is contained in:
Matt Coster
@@ -247,6 +247,409 @@ static void pvr_physical_device_get_supported_features(
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};
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};
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}
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}
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static VkResult
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pvr_physical_device_init_uuids(struct pvr_physical_device *pdevice)
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{
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struct mesa_sha1 sha1_ctx;
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unsigned build_id_len;
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uint8_t sha1[20];
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uint64_t bvnc;
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const struct build_id_note *note =
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build_id_find_nhdr_for_addr(pvr_physical_device_init_uuids);
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if (!note) {
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return vk_errorf(pdevice,
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VK_ERROR_INITIALIZATION_FAILED,
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"Failed to find build-id");
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}
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build_id_len = build_id_length(note);
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if (build_id_len < 20) {
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return vk_errorf(pdevice,
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VK_ERROR_INITIALIZATION_FAILED,
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"Build-id too short. It needs to be a SHA");
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}
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bvnc = pvr_get_packed_bvnc(&pdevice->dev_info);
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_mesa_sha1_init(&sha1_ctx);
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_mesa_sha1_update(&sha1_ctx, build_id_data(note), build_id_len);
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_mesa_sha1_update(&sha1_ctx, &bvnc, sizeof(bvnc));
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_mesa_sha1_final(&sha1_ctx, sha1);
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memcpy(pdevice->pipeline_cache_uuid, sha1, VK_UUID_SIZE);
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return VK_SUCCESS;
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}
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struct pvr_descriptor_limits {
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uint32_t max_per_stage_resources;
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uint32_t max_per_stage_samplers;
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uint32_t max_per_stage_uniform_buffers;
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uint32_t max_per_stage_storage_buffers;
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uint32_t max_per_stage_sampled_images;
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uint32_t max_per_stage_storage_images;
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uint32_t max_per_stage_input_attachments;
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};
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static const struct pvr_descriptor_limits *
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pvr_get_physical_device_descriptor_limits(
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const struct pvr_device_info *dev_info,
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const struct pvr_device_runtime_info *dev_runtime_info)
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{
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enum pvr_descriptor_cs_level {
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/* clang-format off */
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CS4096, /* 6XT and some XE cores with large CS. */
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CS2560, /* Mid range Rogue XE cores. */
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CS2048, /* Low end Rogue XE cores. */
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CS1536, /* Ultra-low-end 9XEP. */
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CS680, /* lower limits for older devices. */
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CS408, /* 7XE. */
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/* clang-format on */
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};
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static const struct pvr_descriptor_limits descriptor_limits[] = {
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[CS4096] = { 1160U, 256U, 192U, 144U, 256U, 256U, 8U, },
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[CS2560] = { 648U, 128U, 128U, 128U, 128U, 128U, 8U, },
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[CS2048] = { 584U, 128U, 96U, 64U, 128U, 128U, 8U, },
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[CS1536] = { 456U, 64U, 96U, 64U, 128U, 64U, 8U, },
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[CS680] = { 224U, 32U, 64U, 36U, 48U, 8U, 8U, },
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[CS408] = { 128U, 16U, 40U, 28U, 16U, 8U, 8U, },
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};
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const uint32_t common_size =
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pvr_calc_fscommon_size_and_tiles_in_flight(dev_info,
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dev_runtime_info,
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UINT32_MAX,
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1);
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enum pvr_descriptor_cs_level cs_level;
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if (common_size >= 2048) {
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cs_level = CS2048;
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} else if (common_size >= 1526) {
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cs_level = CS1536;
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} else if (common_size >= 680) {
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cs_level = CS680;
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} else if (common_size >= 408) {
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cs_level = CS408;
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} else {
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mesa_loge("This core appears to have a very limited amount of shared "
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"register space and may not meet the Vulkan spec limits.");
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abort();
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}
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return &descriptor_limits[cs_level];
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}
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static void
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pvr_get_physical_device_properties_1_1(struct pvr_physical_device *pdevice,
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VkPhysicalDeviceVulkan11Properties *p)
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{
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assert(p->sType == VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_VULKAN_1_1_PROPERTIES);
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}
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static void
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pvr_get_physical_device_properties_1_2(struct pvr_physical_device *pdevice,
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VkPhysicalDeviceVulkan12Properties *p)
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{
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assert(p->sType == VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_VULKAN_1_2_PROPERTIES);
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/* VK_KHR_driver_properties */
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p->driverID = VK_DRIVER_ID_IMAGINATION_OPEN_SOURCE_MESA;
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memset(p->driverName, 0, sizeof(p->driverName));
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snprintf(p->driverName,
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VK_MAX_DRIVER_NAME_SIZE,
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"Imagination open-source Mesa driver");
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memset(p->driverInfo, 0, sizeof(p->driverInfo));
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snprintf(p->driverInfo,
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VK_MAX_DRIVER_INFO_SIZE,
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("Mesa " PACKAGE_VERSION MESA_GIT_SHA1));
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p->conformanceVersion = (VkConformanceVersion){
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.major = 1,
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.minor = 3,
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.subminor = 4,
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.patch = 1,
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};
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/* VK_KHR_timeline_semaphore */
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p->maxTimelineSemaphoreValueDifference = UINT64_MAX;
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}
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static void
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pvr_get_physical_device_properties_1_3(struct pvr_physical_device *pdevice,
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VkPhysicalDeviceVulkan13Properties *p)
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{
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assert(p->sType == VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_VULKAN_1_3_PROPERTIES);
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}
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void pvr_GetPhysicalDeviceProperties(VkPhysicalDevice physicalDevice,
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VkPhysicalDeviceProperties *pProperties)
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{
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PVR_FROM_HANDLE(pvr_physical_device, pdevice, physicalDevice);
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const struct pvr_device_info *const dev_info = &pdevice->dev_info;
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const struct pvr_descriptor_limits *descriptor_limits =
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pvr_get_physical_device_descriptor_limits(dev_info,
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&pdevice->dev_runtime_info);
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/* Default value based on the minimum value found in all existing cores. */
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const uint32_t max_multisample =
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PVR_GET_FEATURE_VALUE(dev_info, max_multisample, 4);
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/* Default value based on the minimum value found in all existing cores. */
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const uint32_t uvs_banks = PVR_GET_FEATURE_VALUE(dev_info, uvs_banks, 2);
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/* Default value based on the minimum value found in all existing cores. */
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const uint32_t uvs_pba_entries =
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PVR_GET_FEATURE_VALUE(dev_info, uvs_pba_entries, 160);
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/* Default value based on the minimum value found in all existing cores. */
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const uint32_t num_user_clip_planes =
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PVR_GET_FEATURE_VALUE(dev_info, num_user_clip_planes, 8);
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const uint32_t sub_pixel_precision =
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PVR_HAS_FEATURE(dev_info, simple_internal_parameter_format) ? 4U : 8U;
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const uint32_t max_render_size = rogue_get_render_size_max(dev_info);
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const uint32_t max_sample_bits = ((max_multisample << 1) - 1);
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const uint32_t max_user_vertex_components =
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((uvs_banks <= 8U) && (uvs_pba_entries == 160U)) ? 64U : 128U;
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/* The workgroup invocations are limited by the case where we have a compute
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* barrier - each slot has a fixed number of invocations, the whole workgroup
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* may need to span multiple slots. As each slot will WAIT at the barrier
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* until the last invocation completes, all have to be schedulable at the
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* same time.
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*
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* Typically all Rogue cores have 16 slots. Some of the smallest cores are
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* reduced to 14.
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*
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* The compute barrier slot exhaustion scenario can be tested with:
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* dEQP-VK.memory_model.message_passing*u32.coherent.fence_fence
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* .atomicwrite*guard*comp
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*/
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/* Default value based on the minimum value found in all existing cores. */
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const uint32_t usc_slots = PVR_GET_FEATURE_VALUE(dev_info, usc_slots, 14);
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/* Default value based on the minimum value found in all existing cores. */
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const uint32_t max_instances_per_pds_task =
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PVR_GET_FEATURE_VALUE(dev_info, max_instances_per_pds_task, 32U);
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const uint32_t max_compute_work_group_invocations =
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(usc_slots * max_instances_per_pds_task >= 512U) ? 512U : 384U;
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VkPhysicalDeviceLimits limits = {
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.maxImageDimension1D = max_render_size,
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.maxImageDimension2D = max_render_size,
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.maxImageDimension3D = PVR_MAX_TEXTURE_EXTENT_Z,
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.maxImageDimensionCube = max_render_size,
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.maxImageArrayLayers = PVR_MAX_ARRAY_LAYERS,
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.maxTexelBufferElements = 64U * 1024U,
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.maxUniformBufferRange = 128U * 1024U * 1024U,
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.maxStorageBufferRange = 128U * 1024U * 1024U,
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.maxPushConstantsSize = PVR_MAX_PUSH_CONSTANTS_SIZE,
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.maxMemoryAllocationCount = UINT32_MAX,
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.maxSamplerAllocationCount = UINT32_MAX,
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.bufferImageGranularity = 1U,
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.sparseAddressSpaceSize = 256ULL * 1024ULL * 1024ULL * 1024ULL,
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/* Maximum number of descriptor sets that can be bound at the same time.
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*/
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.maxBoundDescriptorSets = PVR_MAX_DESCRIPTOR_SETS,
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.maxPerStageResources = descriptor_limits->max_per_stage_resources,
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.maxPerStageDescriptorSamplers =
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descriptor_limits->max_per_stage_samplers,
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.maxPerStageDescriptorUniformBuffers =
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descriptor_limits->max_per_stage_uniform_buffers,
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.maxPerStageDescriptorStorageBuffers =
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descriptor_limits->max_per_stage_storage_buffers,
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.maxPerStageDescriptorSampledImages =
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descriptor_limits->max_per_stage_sampled_images,
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.maxPerStageDescriptorStorageImages =
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descriptor_limits->max_per_stage_storage_images,
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.maxPerStageDescriptorInputAttachments =
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descriptor_limits->max_per_stage_input_attachments,
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.maxDescriptorSetSamplers = 256U,
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.maxDescriptorSetUniformBuffers = 256U,
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.maxDescriptorSetUniformBuffersDynamic =
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PVR_MAX_DESCRIPTOR_SET_UNIFORM_DYNAMIC_BUFFERS,
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.maxDescriptorSetStorageBuffers = 256U,
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.maxDescriptorSetStorageBuffersDynamic =
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PVR_MAX_DESCRIPTOR_SET_STORAGE_DYNAMIC_BUFFERS,
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.maxDescriptorSetSampledImages = 256U,
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.maxDescriptorSetStorageImages = 256U,
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.maxDescriptorSetInputAttachments = 256U,
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/* Vertex Shader Limits */
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.maxVertexInputAttributes = PVR_MAX_VERTEX_INPUT_BINDINGS,
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.maxVertexInputBindings = PVR_MAX_VERTEX_INPUT_BINDINGS,
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.maxVertexInputAttributeOffset = 0xFFFF,
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.maxVertexInputBindingStride = 1024U * 1024U * 1024U * 2U,
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.maxVertexOutputComponents = max_user_vertex_components,
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/* Tessellation Limits */
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.maxTessellationGenerationLevel = 0,
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.maxTessellationPatchSize = 0,
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.maxTessellationControlPerVertexInputComponents = 0,
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.maxTessellationControlPerVertexOutputComponents = 0,
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.maxTessellationControlPerPatchOutputComponents = 0,
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.maxTessellationControlTotalOutputComponents = 0,
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.maxTessellationEvaluationInputComponents = 0,
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.maxTessellationEvaluationOutputComponents = 0,
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/* Geometry Shader Limits */
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.maxGeometryShaderInvocations = 0,
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.maxGeometryInputComponents = 0,
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.maxGeometryOutputComponents = 0,
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.maxGeometryOutputVertices = 0,
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.maxGeometryTotalOutputComponents = 0,
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/* Fragment Shader Limits */
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.maxFragmentInputComponents = max_user_vertex_components,
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.maxFragmentOutputAttachments = PVR_MAX_COLOR_ATTACHMENTS,
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.maxFragmentDualSrcAttachments = 0,
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.maxFragmentCombinedOutputResources =
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descriptor_limits->max_per_stage_storage_buffers +
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descriptor_limits->max_per_stage_storage_images +
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PVR_MAX_COLOR_ATTACHMENTS,
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/* Compute Shader Limits */
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.maxComputeSharedMemorySize = 16U * 1024U,
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.maxComputeWorkGroupCount = { 64U * 1024U, 64U * 1024U, 64U * 1024U },
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.maxComputeWorkGroupInvocations = max_compute_work_group_invocations,
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.maxComputeWorkGroupSize = { max_compute_work_group_invocations,
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max_compute_work_group_invocations,
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64U },
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/* Rasterization Limits */
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.subPixelPrecisionBits = sub_pixel_precision,
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.subTexelPrecisionBits = 8U,
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.mipmapPrecisionBits = 8U,
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.maxDrawIndexedIndexValue = UINT32_MAX,
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.maxDrawIndirectCount = 2U * 1024U * 1024U * 1024U,
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.maxSamplerLodBias = 16.0f,
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.maxSamplerAnisotropy = 1.0f,
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.maxViewports = PVR_MAX_VIEWPORTS,
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|
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.maxViewportDimensions[0] = max_render_size,
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.maxViewportDimensions[1] = max_render_size,
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.viewportBoundsRange[0] = -(int32_t)(2U * max_render_size),
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.viewportBoundsRange[1] = 2U * max_render_size,
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|
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.viewportSubPixelBits = 0,
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.minMemoryMapAlignment = 64U,
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.minTexelBufferOffsetAlignment = 16U,
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.minUniformBufferOffsetAlignment = 4U,
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.minStorageBufferOffsetAlignment = 4U,
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.minTexelOffset = -8,
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.maxTexelOffset = 7U,
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.minTexelGatherOffset = -8,
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.maxTexelGatherOffset = 7,
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.minInterpolationOffset = -0.5,
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.maxInterpolationOffset = 0.5,
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.subPixelInterpolationOffsetBits = 4U,
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||||||
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||||||
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.maxFramebufferWidth = max_render_size,
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||||||
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.maxFramebufferHeight = max_render_size,
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||||||
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.maxFramebufferLayers = PVR_MAX_FRAMEBUFFER_LAYERS,
|
||||||
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||||||
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.framebufferColorSampleCounts = max_sample_bits,
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.framebufferDepthSampleCounts = max_sample_bits,
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||||||
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.framebufferStencilSampleCounts = max_sample_bits,
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||||||
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.framebufferNoAttachmentsSampleCounts = max_sample_bits,
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.maxColorAttachments = PVR_MAX_COLOR_ATTACHMENTS,
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.sampledImageColorSampleCounts = max_sample_bits,
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||||||
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.sampledImageIntegerSampleCounts = max_sample_bits,
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||||||
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.sampledImageDepthSampleCounts = max_sample_bits,
|
||||||
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.sampledImageStencilSampleCounts = max_sample_bits,
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||||||
|
.storageImageSampleCounts = max_sample_bits,
|
||||||
|
.maxSampleMaskWords = 1U,
|
||||||
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.timestampComputeAndGraphics = false,
|
||||||
|
.timestampPeriod = 0.0f,
|
||||||
|
.maxClipDistances = num_user_clip_planes,
|
||||||
|
.maxCullDistances = num_user_clip_planes,
|
||||||
|
.maxCombinedClipAndCullDistances = num_user_clip_planes,
|
||||||
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.discreteQueuePriorities = 2U,
|
||||||
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.pointSizeRange[0] = 1.0f,
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||||||
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.pointSizeRange[1] = 511.0f,
|
||||||
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.pointSizeGranularity = 0.0625f,
|
||||||
|
.lineWidthRange[0] = 1.0f / 16.0f,
|
||||||
|
.lineWidthRange[1] = 16.0f,
|
||||||
|
.lineWidthGranularity = 1.0f / 16.0f,
|
||||||
|
.strictLines = false,
|
||||||
|
.standardSampleLocations = true,
|
||||||
|
.optimalBufferCopyOffsetAlignment = 4U,
|
||||||
|
.optimalBufferCopyRowPitchAlignment = 4U,
|
||||||
|
.nonCoherentAtomSize = 1U,
|
||||||
|
};
|
||||||
|
|
||||||
|
*pProperties = (VkPhysicalDeviceProperties){
|
||||||
|
.apiVersion = PVR_API_VERSION,
|
||||||
|
.driverVersion = vk_get_driver_version(),
|
||||||
|
.vendorID = VK_VENDOR_ID_IMAGINATION,
|
||||||
|
.deviceID = dev_info->ident.device_id,
|
||||||
|
.deviceType = VK_PHYSICAL_DEVICE_TYPE_INTEGRATED_GPU,
|
||||||
|
.limits = limits,
|
||||||
|
.sparseProperties = { 0 },
|
||||||
|
};
|
||||||
|
|
||||||
|
snprintf(pProperties->deviceName,
|
||||||
|
sizeof(pProperties->deviceName),
|
||||||
|
"%s",
|
||||||
|
pdevice->name);
|
||||||
|
|
||||||
|
memcpy(pProperties->pipelineCacheUUID,
|
||||||
|
pdevice->pipeline_cache_uuid,
|
||||||
|
VK_UUID_SIZE);
|
||||||
|
}
|
||||||
|
|
||||||
|
void pvr_GetPhysicalDeviceProperties2(VkPhysicalDevice physicalDevice,
|
||||||
|
VkPhysicalDeviceProperties2 *pProperties)
|
||||||
|
{
|
||||||
|
PVR_FROM_HANDLE(pvr_physical_device, pdevice, physicalDevice);
|
||||||
|
|
||||||
|
VkPhysicalDeviceVulkan11Properties core_1_1 = {
|
||||||
|
.sType = VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_VULKAN_1_1_PROPERTIES,
|
||||||
|
};
|
||||||
|
|
||||||
|
VkPhysicalDeviceVulkan12Properties core_1_2 = {
|
||||||
|
.sType = VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_VULKAN_1_2_PROPERTIES,
|
||||||
|
};
|
||||||
|
|
||||||
|
VkPhysicalDeviceVulkan13Properties core_1_3 = {
|
||||||
|
.sType = VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_VULKAN_1_3_PROPERTIES,
|
||||||
|
};
|
||||||
|
|
||||||
|
pvr_GetPhysicalDeviceProperties(physicalDevice, &pProperties->properties);
|
||||||
|
pvr_get_physical_device_properties_1_1(pdevice, &core_1_1);
|
||||||
|
pvr_get_physical_device_properties_1_2(pdevice, &core_1_2);
|
||||||
|
pvr_get_physical_device_properties_1_3(pdevice, &core_1_3);
|
||||||
|
|
||||||
|
vk_foreach_struct (ext, pProperties->pNext) {
|
||||||
|
if (vk_get_physical_device_core_1_1_property_ext(ext, &core_1_1))
|
||||||
|
continue;
|
||||||
|
|
||||||
|
if (vk_get_physical_device_core_1_2_property_ext(ext, &core_1_2))
|
||||||
|
continue;
|
||||||
|
|
||||||
|
if (vk_get_physical_device_core_1_3_property_ext(ext, &core_1_3))
|
||||||
|
continue;
|
||||||
|
|
||||||
|
switch (ext->sType) {
|
||||||
|
default: {
|
||||||
|
pvr_debug_ignored_stype(ext->sType);
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
VkResult pvr_EnumerateInstanceVersion(uint32_t *pApiVersion)
|
VkResult pvr_EnumerateInstanceVersion(uint32_t *pApiVersion)
|
||||||
{
|
{
|
||||||
*pApiVersion = PVR_API_VERSION;
|
*pApiVersion = PVR_API_VERSION;
|
||||||
@@ -309,40 +712,6 @@ void pvr_DestroyInstance(VkInstance _instance,
|
|||||||
vk_free(&instance->vk.alloc, instance);
|
vk_free(&instance->vk.alloc, instance);
|
||||||
}
|
}
|
||||||
|
|
||||||
static VkResult
|
|
||||||
pvr_physical_device_init_uuids(struct pvr_physical_device *pdevice)
|
|
||||||
{
|
|
||||||
struct mesa_sha1 sha1_ctx;
|
|
||||||
unsigned build_id_len;
|
|
||||||
uint8_t sha1[20];
|
|
||||||
uint64_t bvnc;
|
|
||||||
|
|
||||||
const struct build_id_note *note =
|
|
||||||
build_id_find_nhdr_for_addr(pvr_physical_device_init_uuids);
|
|
||||||
if (!note) {
|
|
||||||
return vk_errorf(pdevice,
|
|
||||||
VK_ERROR_INITIALIZATION_FAILED,
|
|
||||||
"Failed to find build-id");
|
|
||||||
}
|
|
||||||
|
|
||||||
build_id_len = build_id_length(note);
|
|
||||||
if (build_id_len < 20) {
|
|
||||||
return vk_errorf(pdevice,
|
|
||||||
VK_ERROR_INITIALIZATION_FAILED,
|
|
||||||
"Build-id too short. It needs to be a SHA");
|
|
||||||
}
|
|
||||||
|
|
||||||
bvnc = pvr_get_packed_bvnc(&pdevice->dev_info);
|
|
||||||
|
|
||||||
_mesa_sha1_init(&sha1_ctx);
|
|
||||||
_mesa_sha1_update(&sha1_ctx, build_id_data(note), build_id_len);
|
|
||||||
_mesa_sha1_update(&sha1_ctx, &bvnc, sizeof(bvnc));
|
|
||||||
_mesa_sha1_final(&sha1_ctx, sha1);
|
|
||||||
memcpy(pdevice->pipeline_cache_uuid, sha1, VK_UUID_SIZE);
|
|
||||||
|
|
||||||
return VK_SUCCESS;
|
|
||||||
}
|
|
||||||
|
|
||||||
static uint64_t pvr_compute_heap_size(void)
|
static uint64_t pvr_compute_heap_size(void)
|
||||||
{
|
{
|
||||||
/* Query the total ram from the system */
|
/* Query the total ram from the system */
|
||||||
@@ -857,375 +1226,6 @@ uint32_t pvr_calc_fscommon_size_and_tiles_in_flight(
|
|||||||
return MIN2(num_tile_in_flight, max_tiles_in_flight);
|
return MIN2(num_tile_in_flight, max_tiles_in_flight);
|
||||||
}
|
}
|
||||||
|
|
||||||
struct pvr_descriptor_limits {
|
|
||||||
uint32_t max_per_stage_resources;
|
|
||||||
uint32_t max_per_stage_samplers;
|
|
||||||
uint32_t max_per_stage_uniform_buffers;
|
|
||||||
uint32_t max_per_stage_storage_buffers;
|
|
||||||
uint32_t max_per_stage_sampled_images;
|
|
||||||
uint32_t max_per_stage_storage_images;
|
|
||||||
uint32_t max_per_stage_input_attachments;
|
|
||||||
};
|
|
||||||
|
|
||||||
static const struct pvr_descriptor_limits *
|
|
||||||
pvr_get_physical_device_descriptor_limits(
|
|
||||||
const struct pvr_device_info *dev_info,
|
|
||||||
const struct pvr_device_runtime_info *dev_runtime_info)
|
|
||||||
{
|
|
||||||
enum pvr_descriptor_cs_level {
|
|
||||||
/* clang-format off */
|
|
||||||
CS4096, /* 6XT and some XE cores with large CS. */
|
|
||||||
CS2560, /* Mid range Rogue XE cores. */
|
|
||||||
CS2048, /* Low end Rogue XE cores. */
|
|
||||||
CS1536, /* Ultra-low-end 9XEP. */
|
|
||||||
CS680, /* lower limits for older devices. */
|
|
||||||
CS408, /* 7XE. */
|
|
||||||
/* clang-format on */
|
|
||||||
};
|
|
||||||
|
|
||||||
static const struct pvr_descriptor_limits descriptor_limits[] = {
|
|
||||||
[CS4096] = { 1160U, 256U, 192U, 144U, 256U, 256U, 8U, },
|
|
||||||
[CS2560] = { 648U, 128U, 128U, 128U, 128U, 128U, 8U, },
|
|
||||||
[CS2048] = { 584U, 128U, 96U, 64U, 128U, 128U, 8U, },
|
|
||||||
[CS1536] = { 456U, 64U, 96U, 64U, 128U, 64U, 8U, },
|
|
||||||
[CS680] = { 224U, 32U, 64U, 36U, 48U, 8U, 8U, },
|
|
||||||
[CS408] = { 128U, 16U, 40U, 28U, 16U, 8U, 8U, },
|
|
||||||
};
|
|
||||||
|
|
||||||
const uint32_t common_size =
|
|
||||||
pvr_calc_fscommon_size_and_tiles_in_flight(dev_info,
|
|
||||||
dev_runtime_info,
|
|
||||||
UINT32_MAX,
|
|
||||||
1);
|
|
||||||
enum pvr_descriptor_cs_level cs_level;
|
|
||||||
|
|
||||||
if (common_size >= 2048) {
|
|
||||||
cs_level = CS2048;
|
|
||||||
} else if (common_size >= 1526) {
|
|
||||||
cs_level = CS1536;
|
|
||||||
} else if (common_size >= 680) {
|
|
||||||
cs_level = CS680;
|
|
||||||
} else if (common_size >= 408) {
|
|
||||||
cs_level = CS408;
|
|
||||||
} else {
|
|
||||||
mesa_loge("This core appears to have a very limited amount of shared "
|
|
||||||
"register space and may not meet the Vulkan spec limits.");
|
|
||||||
abort();
|
|
||||||
}
|
|
||||||
|
|
||||||
return &descriptor_limits[cs_level];
|
|
||||||
}
|
|
||||||
|
|
||||||
static void
|
|
||||||
pvr_get_physical_device_properties_1_1(struct pvr_physical_device *pdevice,
|
|
||||||
VkPhysicalDeviceVulkan11Properties *p)
|
|
||||||
{
|
|
||||||
assert(p->sType == VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_VULKAN_1_1_PROPERTIES);
|
|
||||||
}
|
|
||||||
|
|
||||||
static void
|
|
||||||
pvr_get_physical_device_properties_1_2(struct pvr_physical_device *pdevice,
|
|
||||||
VkPhysicalDeviceVulkan12Properties *p)
|
|
||||||
{
|
|
||||||
assert(p->sType == VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_VULKAN_1_2_PROPERTIES);
|
|
||||||
|
|
||||||
/* VK_KHR_driver_properties */
|
|
||||||
p->driverID = VK_DRIVER_ID_IMAGINATION_OPEN_SOURCE_MESA;
|
|
||||||
memset(p->driverName, 0, sizeof(p->driverName));
|
|
||||||
snprintf(p->driverName,
|
|
||||||
VK_MAX_DRIVER_NAME_SIZE,
|
|
||||||
"Imagination open-source Mesa driver");
|
|
||||||
memset(p->driverInfo, 0, sizeof(p->driverInfo));
|
|
||||||
snprintf(p->driverInfo,
|
|
||||||
VK_MAX_DRIVER_INFO_SIZE,
|
|
||||||
("Mesa " PACKAGE_VERSION MESA_GIT_SHA1));
|
|
||||||
p->conformanceVersion = (VkConformanceVersion){
|
|
||||||
.major = 1,
|
|
||||||
.minor = 3,
|
|
||||||
.subminor = 4,
|
|
||||||
.patch = 1,
|
|
||||||
};
|
|
||||||
|
|
||||||
/* VK_KHR_timeline_semaphore */
|
|
||||||
p->maxTimelineSemaphoreValueDifference = UINT64_MAX;
|
|
||||||
}
|
|
||||||
|
|
||||||
static void
|
|
||||||
pvr_get_physical_device_properties_1_3(struct pvr_physical_device *pdevice,
|
|
||||||
VkPhysicalDeviceVulkan13Properties *p)
|
|
||||||
{
|
|
||||||
assert(p->sType == VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_VULKAN_1_3_PROPERTIES);
|
|
||||||
}
|
|
||||||
|
|
||||||
void pvr_GetPhysicalDeviceProperties(VkPhysicalDevice physicalDevice,
|
|
||||||
VkPhysicalDeviceProperties *pProperties)
|
|
||||||
{
|
|
||||||
PVR_FROM_HANDLE(pvr_physical_device, pdevice, physicalDevice);
|
|
||||||
const struct pvr_device_info *const dev_info = &pdevice->dev_info;
|
|
||||||
|
|
||||||
const struct pvr_descriptor_limits *descriptor_limits =
|
|
||||||
pvr_get_physical_device_descriptor_limits(dev_info,
|
|
||||||
&pdevice->dev_runtime_info);
|
|
||||||
|
|
||||||
/* Default value based on the minimum value found in all existing cores. */
|
|
||||||
const uint32_t max_multisample =
|
|
||||||
PVR_GET_FEATURE_VALUE(dev_info, max_multisample, 4);
|
|
||||||
|
|
||||||
/* Default value based on the minimum value found in all existing cores. */
|
|
||||||
const uint32_t uvs_banks = PVR_GET_FEATURE_VALUE(dev_info, uvs_banks, 2);
|
|
||||||
|
|
||||||
/* Default value based on the minimum value found in all existing cores. */
|
|
||||||
const uint32_t uvs_pba_entries =
|
|
||||||
PVR_GET_FEATURE_VALUE(dev_info, uvs_pba_entries, 160);
|
|
||||||
|
|
||||||
/* Default value based on the minimum value found in all existing cores. */
|
|
||||||
const uint32_t num_user_clip_planes =
|
|
||||||
PVR_GET_FEATURE_VALUE(dev_info, num_user_clip_planes, 8);
|
|
||||||
|
|
||||||
const uint32_t sub_pixel_precision =
|
|
||||||
PVR_HAS_FEATURE(dev_info, simple_internal_parameter_format) ? 4U : 8U;
|
|
||||||
|
|
||||||
const uint32_t max_render_size = rogue_get_render_size_max(dev_info);
|
|
||||||
|
|
||||||
const uint32_t max_sample_bits = ((max_multisample << 1) - 1);
|
|
||||||
|
|
||||||
const uint32_t max_user_vertex_components =
|
|
||||||
((uvs_banks <= 8U) && (uvs_pba_entries == 160U)) ? 64U : 128U;
|
|
||||||
|
|
||||||
/* The workgroup invocations are limited by the case where we have a compute
|
|
||||||
* barrier - each slot has a fixed number of invocations, the whole workgroup
|
|
||||||
* may need to span multiple slots. As each slot will WAIT at the barrier
|
|
||||||
* until the last invocation completes, all have to be schedulable at the
|
|
||||||
* same time.
|
|
||||||
*
|
|
||||||
* Typically all Rogue cores have 16 slots. Some of the smallest cores are
|
|
||||||
* reduced to 14.
|
|
||||||
*
|
|
||||||
* The compute barrier slot exhaustion scenario can be tested with:
|
|
||||||
* dEQP-VK.memory_model.message_passing*u32.coherent.fence_fence
|
|
||||||
* .atomicwrite*guard*comp
|
|
||||||
*/
|
|
||||||
|
|
||||||
/* Default value based on the minimum value found in all existing cores. */
|
|
||||||
const uint32_t usc_slots = PVR_GET_FEATURE_VALUE(dev_info, usc_slots, 14);
|
|
||||||
|
|
||||||
/* Default value based on the minimum value found in all existing cores. */
|
|
||||||
const uint32_t max_instances_per_pds_task =
|
|
||||||
PVR_GET_FEATURE_VALUE(dev_info, max_instances_per_pds_task, 32U);
|
|
||||||
|
|
||||||
const uint32_t max_compute_work_group_invocations =
|
|
||||||
(usc_slots * max_instances_per_pds_task >= 512U) ? 512U : 384U;
|
|
||||||
|
|
||||||
VkPhysicalDeviceLimits limits = {
|
|
||||||
.maxImageDimension1D = max_render_size,
|
|
||||||
.maxImageDimension2D = max_render_size,
|
|
||||||
.maxImageDimension3D = PVR_MAX_TEXTURE_EXTENT_Z,
|
|
||||||
.maxImageDimensionCube = max_render_size,
|
|
||||||
.maxImageArrayLayers = PVR_MAX_ARRAY_LAYERS,
|
|
||||||
.maxTexelBufferElements = 64U * 1024U,
|
|
||||||
.maxUniformBufferRange = 128U * 1024U * 1024U,
|
|
||||||
.maxStorageBufferRange = 128U * 1024U * 1024U,
|
|
||||||
.maxPushConstantsSize = PVR_MAX_PUSH_CONSTANTS_SIZE,
|
|
||||||
.maxMemoryAllocationCount = UINT32_MAX,
|
|
||||||
.maxSamplerAllocationCount = UINT32_MAX,
|
|
||||||
.bufferImageGranularity = 1U,
|
|
||||||
.sparseAddressSpaceSize = 256ULL * 1024ULL * 1024ULL * 1024ULL,
|
|
||||||
|
|
||||||
/* Maximum number of descriptor sets that can be bound at the same time.
|
|
||||||
*/
|
|
||||||
.maxBoundDescriptorSets = PVR_MAX_DESCRIPTOR_SETS,
|
|
||||||
|
|
||||||
.maxPerStageResources = descriptor_limits->max_per_stage_resources,
|
|
||||||
.maxPerStageDescriptorSamplers =
|
|
||||||
descriptor_limits->max_per_stage_samplers,
|
|
||||||
.maxPerStageDescriptorUniformBuffers =
|
|
||||||
descriptor_limits->max_per_stage_uniform_buffers,
|
|
||||||
.maxPerStageDescriptorStorageBuffers =
|
|
||||||
descriptor_limits->max_per_stage_storage_buffers,
|
|
||||||
.maxPerStageDescriptorSampledImages =
|
|
||||||
descriptor_limits->max_per_stage_sampled_images,
|
|
||||||
.maxPerStageDescriptorStorageImages =
|
|
||||||
descriptor_limits->max_per_stage_storage_images,
|
|
||||||
.maxPerStageDescriptorInputAttachments =
|
|
||||||
descriptor_limits->max_per_stage_input_attachments,
|
|
||||||
|
|
||||||
.maxDescriptorSetSamplers = 256U,
|
|
||||||
.maxDescriptorSetUniformBuffers = 256U,
|
|
||||||
.maxDescriptorSetUniformBuffersDynamic =
|
|
||||||
PVR_MAX_DESCRIPTOR_SET_UNIFORM_DYNAMIC_BUFFERS,
|
|
||||||
.maxDescriptorSetStorageBuffers = 256U,
|
|
||||||
.maxDescriptorSetStorageBuffersDynamic =
|
|
||||||
PVR_MAX_DESCRIPTOR_SET_STORAGE_DYNAMIC_BUFFERS,
|
|
||||||
.maxDescriptorSetSampledImages = 256U,
|
|
||||||
.maxDescriptorSetStorageImages = 256U,
|
|
||||||
.maxDescriptorSetInputAttachments = 256U,
|
|
||||||
|
|
||||||
/* Vertex Shader Limits */
|
|
||||||
.maxVertexInputAttributes = PVR_MAX_VERTEX_INPUT_BINDINGS,
|
|
||||||
.maxVertexInputBindings = PVR_MAX_VERTEX_INPUT_BINDINGS,
|
|
||||||
.maxVertexInputAttributeOffset = 0xFFFF,
|
|
||||||
.maxVertexInputBindingStride = 1024U * 1024U * 1024U * 2U,
|
|
||||||
.maxVertexOutputComponents = max_user_vertex_components,
|
|
||||||
|
|
||||||
/* Tessellation Limits */
|
|
||||||
.maxTessellationGenerationLevel = 0,
|
|
||||||
.maxTessellationPatchSize = 0,
|
|
||||||
.maxTessellationControlPerVertexInputComponents = 0,
|
|
||||||
.maxTessellationControlPerVertexOutputComponents = 0,
|
|
||||||
.maxTessellationControlPerPatchOutputComponents = 0,
|
|
||||||
.maxTessellationControlTotalOutputComponents = 0,
|
|
||||||
.maxTessellationEvaluationInputComponents = 0,
|
|
||||||
.maxTessellationEvaluationOutputComponents = 0,
|
|
||||||
|
|
||||||
/* Geometry Shader Limits */
|
|
||||||
.maxGeometryShaderInvocations = 0,
|
|
||||||
.maxGeometryInputComponents = 0,
|
|
||||||
.maxGeometryOutputComponents = 0,
|
|
||||||
.maxGeometryOutputVertices = 0,
|
|
||||||
.maxGeometryTotalOutputComponents = 0,
|
|
||||||
|
|
||||||
/* Fragment Shader Limits */
|
|
||||||
.maxFragmentInputComponents = max_user_vertex_components,
|
|
||||||
.maxFragmentOutputAttachments = PVR_MAX_COLOR_ATTACHMENTS,
|
|
||||||
.maxFragmentDualSrcAttachments = 0,
|
|
||||||
.maxFragmentCombinedOutputResources =
|
|
||||||
descriptor_limits->max_per_stage_storage_buffers +
|
|
||||||
descriptor_limits->max_per_stage_storage_images +
|
|
||||||
PVR_MAX_COLOR_ATTACHMENTS,
|
|
||||||
|
|
||||||
/* Compute Shader Limits */
|
|
||||||
.maxComputeSharedMemorySize = 16U * 1024U,
|
|
||||||
.maxComputeWorkGroupCount = { 64U * 1024U, 64U * 1024U, 64U * 1024U },
|
|
||||||
.maxComputeWorkGroupInvocations = max_compute_work_group_invocations,
|
|
||||||
.maxComputeWorkGroupSize = { max_compute_work_group_invocations,
|
|
||||||
max_compute_work_group_invocations,
|
|
||||||
64U },
|
|
||||||
|
|
||||||
/* Rasterization Limits */
|
|
||||||
.subPixelPrecisionBits = sub_pixel_precision,
|
|
||||||
.subTexelPrecisionBits = 8U,
|
|
||||||
.mipmapPrecisionBits = 8U,
|
|
||||||
|
|
||||||
.maxDrawIndexedIndexValue = UINT32_MAX,
|
|
||||||
.maxDrawIndirectCount = 2U * 1024U * 1024U * 1024U,
|
|
||||||
.maxSamplerLodBias = 16.0f,
|
|
||||||
.maxSamplerAnisotropy = 1.0f,
|
|
||||||
.maxViewports = PVR_MAX_VIEWPORTS,
|
|
||||||
|
|
||||||
.maxViewportDimensions[0] = max_render_size,
|
|
||||||
.maxViewportDimensions[1] = max_render_size,
|
|
||||||
.viewportBoundsRange[0] = -(int32_t)(2U * max_render_size),
|
|
||||||
.viewportBoundsRange[1] = 2U * max_render_size,
|
|
||||||
|
|
||||||
.viewportSubPixelBits = 0,
|
|
||||||
.minMemoryMapAlignment = 64U,
|
|
||||||
.minTexelBufferOffsetAlignment = 16U,
|
|
||||||
.minUniformBufferOffsetAlignment = 4U,
|
|
||||||
.minStorageBufferOffsetAlignment = 4U,
|
|
||||||
|
|
||||||
.minTexelOffset = -8,
|
|
||||||
.maxTexelOffset = 7U,
|
|
||||||
.minTexelGatherOffset = -8,
|
|
||||||
.maxTexelGatherOffset = 7,
|
|
||||||
.minInterpolationOffset = -0.5,
|
|
||||||
.maxInterpolationOffset = 0.5,
|
|
||||||
.subPixelInterpolationOffsetBits = 4U,
|
|
||||||
|
|
||||||
.maxFramebufferWidth = max_render_size,
|
|
||||||
.maxFramebufferHeight = max_render_size,
|
|
||||||
.maxFramebufferLayers = PVR_MAX_FRAMEBUFFER_LAYERS,
|
|
||||||
|
|
||||||
.framebufferColorSampleCounts = max_sample_bits,
|
|
||||||
.framebufferDepthSampleCounts = max_sample_bits,
|
|
||||||
.framebufferStencilSampleCounts = max_sample_bits,
|
|
||||||
.framebufferNoAttachmentsSampleCounts = max_sample_bits,
|
|
||||||
.maxColorAttachments = PVR_MAX_COLOR_ATTACHMENTS,
|
|
||||||
.sampledImageColorSampleCounts = max_sample_bits,
|
|
||||||
.sampledImageIntegerSampleCounts = max_sample_bits,
|
|
||||||
.sampledImageDepthSampleCounts = max_sample_bits,
|
|
||||||
.sampledImageStencilSampleCounts = max_sample_bits,
|
|
||||||
.storageImageSampleCounts = max_sample_bits,
|
|
||||||
.maxSampleMaskWords = 1U,
|
|
||||||
.timestampComputeAndGraphics = false,
|
|
||||||
.timestampPeriod = 0.0f,
|
|
||||||
.maxClipDistances = num_user_clip_planes,
|
|
||||||
.maxCullDistances = num_user_clip_planes,
|
|
||||||
.maxCombinedClipAndCullDistances = num_user_clip_planes,
|
|
||||||
.discreteQueuePriorities = 2U,
|
|
||||||
.pointSizeRange[0] = 1.0f,
|
|
||||||
.pointSizeRange[1] = 511.0f,
|
|
||||||
.pointSizeGranularity = 0.0625f,
|
|
||||||
.lineWidthRange[0] = 1.0f / 16.0f,
|
|
||||||
.lineWidthRange[1] = 16.0f,
|
|
||||||
.lineWidthGranularity = 1.0f / 16.0f,
|
|
||||||
.strictLines = false,
|
|
||||||
.standardSampleLocations = true,
|
|
||||||
.optimalBufferCopyOffsetAlignment = 4U,
|
|
||||||
.optimalBufferCopyRowPitchAlignment = 4U,
|
|
||||||
.nonCoherentAtomSize = 1U,
|
|
||||||
};
|
|
||||||
|
|
||||||
*pProperties = (VkPhysicalDeviceProperties){
|
|
||||||
.apiVersion = PVR_API_VERSION,
|
|
||||||
.driverVersion = vk_get_driver_version(),
|
|
||||||
.vendorID = VK_VENDOR_ID_IMAGINATION,
|
|
||||||
.deviceID = dev_info->ident.device_id,
|
|
||||||
.deviceType = VK_PHYSICAL_DEVICE_TYPE_INTEGRATED_GPU,
|
|
||||||
.limits = limits,
|
|
||||||
.sparseProperties = { 0 },
|
|
||||||
};
|
|
||||||
|
|
||||||
snprintf(pProperties->deviceName,
|
|
||||||
sizeof(pProperties->deviceName),
|
|
||||||
"%s",
|
|
||||||
pdevice->name);
|
|
||||||
|
|
||||||
memcpy(pProperties->pipelineCacheUUID,
|
|
||||||
pdevice->pipeline_cache_uuid,
|
|
||||||
VK_UUID_SIZE);
|
|
||||||
}
|
|
||||||
|
|
||||||
void pvr_GetPhysicalDeviceProperties2(VkPhysicalDevice physicalDevice,
|
|
||||||
VkPhysicalDeviceProperties2 *pProperties)
|
|
||||||
{
|
|
||||||
PVR_FROM_HANDLE(pvr_physical_device, pdevice, physicalDevice);
|
|
||||||
|
|
||||||
VkPhysicalDeviceVulkan11Properties core_1_1 = {
|
|
||||||
.sType = VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_VULKAN_1_1_PROPERTIES,
|
|
||||||
};
|
|
||||||
|
|
||||||
VkPhysicalDeviceVulkan12Properties core_1_2 = {
|
|
||||||
.sType = VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_VULKAN_1_2_PROPERTIES,
|
|
||||||
};
|
|
||||||
|
|
||||||
VkPhysicalDeviceVulkan13Properties core_1_3 = {
|
|
||||||
.sType = VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_VULKAN_1_3_PROPERTIES,
|
|
||||||
};
|
|
||||||
|
|
||||||
pvr_GetPhysicalDeviceProperties(physicalDevice, &pProperties->properties);
|
|
||||||
pvr_get_physical_device_properties_1_1(pdevice, &core_1_1);
|
|
||||||
pvr_get_physical_device_properties_1_2(pdevice, &core_1_2);
|
|
||||||
pvr_get_physical_device_properties_1_3(pdevice, &core_1_3);
|
|
||||||
|
|
||||||
vk_foreach_struct (ext, pProperties->pNext) {
|
|
||||||
if (vk_get_physical_device_core_1_1_property_ext(ext, &core_1_1))
|
|
||||||
continue;
|
|
||||||
|
|
||||||
if (vk_get_physical_device_core_1_2_property_ext(ext, &core_1_2))
|
|
||||||
continue;
|
|
||||||
|
|
||||||
if (vk_get_physical_device_core_1_3_property_ext(ext, &core_1_3))
|
|
||||||
continue;
|
|
||||||
|
|
||||||
switch (ext->sType) {
|
|
||||||
default: {
|
|
||||||
pvr_debug_ignored_stype(ext->sType);
|
|
||||||
break;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
const static VkQueueFamilyProperties pvr_queue_family_properties = {
|
const static VkQueueFamilyProperties pvr_queue_family_properties = {
|
||||||
.queueFlags = VK_QUEUE_COMPUTE_BIT | VK_QUEUE_GRAPHICS_BIT |
|
.queueFlags = VK_QUEUE_COMPUTE_BIT | VK_QUEUE_GRAPHICS_BIT |
|
||||||
VK_QUEUE_TRANSFER_BIT,
|
VK_QUEUE_TRANSFER_BIT,
|
||||||
|
|||||||
Reference in New Issue
Block a user