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intel/compiler/xe2: Account for reg_unit() in TCS intrinsics

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Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25020>
This commit is contained in:
Caio Oliveira
2022-09-07 00:22:13 -07:00
committed by Jordan Justen
parent 610daa3166
commit 9859f5b4d2
1 changed files with 7 additions and 6 deletions
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13
src/intel/compiler/brw_fs_nir.cpp
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@@ -2735,7 +2735,8 @@ fs_visitor::get_tcs_multi_patch_icp_handle(const fs_builder &bld,
*/ */
bld.emit(SHADER_OPCODE_MOV_INDIRECT, icp_handle, start, bld.emit(SHADER_OPCODE_MOV_INDIRECT, icp_handle, start,
icp_offset_bytes, icp_offset_bytes,
brw_imm_ud(brw_tcs_prog_key_input_vertices(tcs_key) * REG_SIZE)); brw_imm_ud(brw_tcs_prog_key_input_vertices(tcs_key) * REG_SIZE *
reg_unit(devinfo)));
return icp_handle; return icp_handle;
} }
@@ -2843,7 +2844,7 @@ fs_visitor::nir_emit_tcs_intrinsic(const fs_builder &bld,
if (inst->offset == 0 && indirect_offset.file == BAD_FILE) { if (inst->offset == 0 && indirect_offset.file == BAD_FILE) {
assert(type_sz(dst.type) == 4); assert(type_sz(dst.type) == 4);
inst->dst = bld.vgrf(dst.type, 4); inst->dst = bld.vgrf(dst.type, 4);
inst->size_written = 4 * REG_SIZE; inst->size_written = 4 * REG_SIZE * reg_unit(devinfo);
bld.MOV(dst, offset(inst->dst, bld, 3)); bld.MOV(dst, offset(inst->dst, bld, 3));
} }
break; break;
@@ -2874,7 +2875,7 @@ fs_visitor::nir_emit_tcs_intrinsic(const fs_builder &bld,
fs_reg tmp = bld.vgrf(dst.type, read_components); fs_reg tmp = bld.vgrf(dst.type, read_components);
inst = bld.emit(SHADER_OPCODE_URB_READ_LOGICAL, tmp, inst = bld.emit(SHADER_OPCODE_URB_READ_LOGICAL, tmp,
srcs, ARRAY_SIZE(srcs)); srcs, ARRAY_SIZE(srcs));
inst->size_written = read_components * REG_SIZE; inst->size_written = read_components * REG_SIZE * reg_unit(devinfo);
for (unsigned i = 0; i < instr->num_components; i++) { for (unsigned i = 0; i < instr->num_components; i++) {
bld.MOV(offset(dst, bld, i), bld.MOV(offset(dst, bld, i),
offset(tmp, bld, i + first_component)); offset(tmp, bld, i + first_component));
@@ -2882,7 +2883,7 @@ fs_visitor::nir_emit_tcs_intrinsic(const fs_builder &bld,
} else { } else {
inst = bld.emit(SHADER_OPCODE_URB_READ_LOGICAL, dst, inst = bld.emit(SHADER_OPCODE_URB_READ_LOGICAL, dst,
srcs, ARRAY_SIZE(srcs)); srcs, ARRAY_SIZE(srcs));
inst->size_written = instr->num_components * REG_SIZE; inst->size_written = instr->num_components * REG_SIZE * reg_unit(devinfo);
} }
inst->offset = imm_offset; inst->offset = imm_offset;
inst->mlen = 1; inst->mlen = 1;
@@ -2899,7 +2900,7 @@ fs_visitor::nir_emit_tcs_intrinsic(const fs_builder &bld,
fs_reg tmp = bld.vgrf(dst.type, read_components); fs_reg tmp = bld.vgrf(dst.type, read_components);
inst = bld.emit(SHADER_OPCODE_URB_READ_LOGICAL, tmp, inst = bld.emit(SHADER_OPCODE_URB_READ_LOGICAL, tmp,
srcs, ARRAY_SIZE(srcs)); srcs, ARRAY_SIZE(srcs));
inst->size_written = read_components * REG_SIZE; inst->size_written = read_components * REG_SIZE * reg_unit(devinfo);
for (unsigned i = 0; i < instr->num_components; i++) { for (unsigned i = 0; i < instr->num_components; i++) {
bld.MOV(offset(dst, bld, i), bld.MOV(offset(dst, bld, i),
offset(tmp, bld, i + first_component)); offset(tmp, bld, i + first_component));
@@ -2907,7 +2908,7 @@ fs_visitor::nir_emit_tcs_intrinsic(const fs_builder &bld,
} else { } else {
inst = bld.emit(SHADER_OPCODE_URB_READ_LOGICAL, dst, inst = bld.emit(SHADER_OPCODE_URB_READ_LOGICAL, dst,
srcs, ARRAY_SIZE(srcs)); srcs, ARRAY_SIZE(srcs));
inst->size_written = instr->num_components * REG_SIZE; inst->size_written = instr->num_components * REG_SIZE * reg_unit(devinfo);
} }
inst->offset = imm_offset; inst->offset = imm_offset;
inst->mlen = 2; inst->mlen = 2;