main: use new driver flag for conservative rasterization state
Suggested by Marek. v2: Use new driver flag (Marek) v3: Fix i965 comments (Lionel) Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Reviewed-by: Marek Olšák <marek.olsak@amd.com>
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@@ -226,6 +226,7 @@ enum brw_state_id {
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BRW_STATE_CC_STATE,
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BRW_STATE_BLORP,
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BRW_STATE_VIEWPORT_COUNT,
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BRW_STATE_CONSERVATIVE_RASTERIZATION,
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BRW_NUM_STATE_BITS
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};
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@@ -316,6 +317,7 @@ enum brw_state_id {
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#define BRW_NEW_URB_SIZE (1ull << BRW_STATE_URB_SIZE)
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#define BRW_NEW_CC_STATE (1ull << BRW_STATE_CC_STATE)
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#define BRW_NEW_BLORP (1ull << BRW_STATE_BLORP)
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#define BRW_NEW_CONSERVATIVE_RASTERIZATION (1ull << BRW_STATE_CONSERVATIVE_RASTERIZATION)
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struct brw_state_flags {
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/** State update flags signalled by mesa internals */
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@@ -529,6 +529,7 @@ void brw_init_state( struct brw_context *brw )
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ctx->DriverFlags.NewAtomicBuffer = BRW_NEW_ATOMIC_BUFFER;
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ctx->DriverFlags.NewImageUnits = BRW_NEW_IMAGE_UNITS;
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ctx->DriverFlags.NewDefaultTessLevels = BRW_NEW_DEFAULT_TESS_LEVELS;
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ctx->DriverFlags.NewIntelConservativeRasterization = BRW_NEW_CONSERVATIVE_RASTERIZATION;
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}
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@@ -663,6 +664,7 @@ static struct dirty_bit_map brw_bits[] = {
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DEFINE_BIT(BRW_NEW_CC_STATE),
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DEFINE_BIT(BRW_NEW_BLORP),
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DEFINE_BIT(BRW_NEW_VIEWPORT_COUNT),
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DEFINE_BIT(BRW_NEW_CONSERVATIVE_RASTERIZATION),
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{0, 0, 0}
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};
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@@ -53,7 +53,7 @@ gen8_upload_ps_extra(struct brw_context *brw,
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if (prog_data->persample_dispatch)
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dw1 |= GEN8_PSX_SHADER_IS_PER_SAMPLE;
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/* _NEW_POLYGON */
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/* _NEW_MULTISAMPLE | BRW_NEW_CONSERVATIVE_RASTERIZATION */
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if (prog_data->uses_sample_mask) {
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if (brw->gen >= 9) {
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if (prog_data->post_depth_coverage)
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@@ -131,7 +131,8 @@ const struct brw_tracked_state gen8_ps_extra = {
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.brw = BRW_NEW_BLORP |
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BRW_NEW_CONTEXT |
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BRW_NEW_FRAGMENT_PROGRAM |
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BRW_NEW_FS_PROG_DATA,
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BRW_NEW_FS_PROG_DATA |
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BRW_NEW_CONSERVATIVE_RASTERIZATION,
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},
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.emit = upload_ps_extra,
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};
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@@ -291,8 +292,7 @@ upload_ps_state(struct brw_context *brw)
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const struct brw_tracked_state gen8_ps_state = {
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.dirty = {
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.mesa = _NEW_MULTISAMPLE |
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_NEW_POLYGON,
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.mesa = _NEW_MULTISAMPLE,
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.brw = BRW_NEW_BATCH |
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BRW_NEW_BLORP |
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BRW_NEW_FS_PROG_DATA,
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@@ -319,7 +319,7 @@ upload_raster(struct brw_context *brw)
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}
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}
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/* _NEW_POLYGON */
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/* BRW_NEW_CONSERVATIVE_RASTERIZATION */
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if (ctx->IntelConservativeRasterization) {
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if (brw->gen >= 9)
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dw1 |= GEN9_RASTER_CONSERVATIVE_RASTERIZATION_ENABLE;
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@@ -344,7 +344,8 @@ const struct brw_tracked_state gen8_raster_state = {
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_NEW_SCISSOR |
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_NEW_TRANSFORM,
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.brw = BRW_NEW_BLORP |
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BRW_NEW_CONTEXT,
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BRW_NEW_CONTEXT |
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BRW_NEW_CONSERVATIVE_RASTERIZATION,
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},
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.emit = upload_raster,
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};
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@@ -444,7 +444,9 @@ _mesa_set_enable(struct gl_context *ctx, GLenum cap, GLboolean state)
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goto invalid_enum_error;
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if (ctx->IntelConservativeRasterization == state)
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return;
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FLUSH_VERTICES(ctx, _NEW_POLYGON);
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FLUSH_VERTICES(ctx, 0);
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ctx->NewDriverState |=
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ctx->DriverFlags.NewIntelConservativeRasterization;
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ctx->IntelConservativeRasterization = state;
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break;
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case GL_COLOR_LOGIC_OP:
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@@ -4222,6 +4222,11 @@ struct gl_driver_flags
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* gl_context::TessCtrlProgram::patch_default_*
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*/
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uint64_t NewDefaultTessLevels;
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/**
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* gl_context::IntelConservativeRasterization
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*/
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uint64_t NewIntelConservativeRasterization;
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};
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struct gl_uniform_buffer_binding
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