Move the intel vulkan driver to src/intel/vulkan
This commit is contained in:
Jason Ekstrand
358
src/intel/vulkan/anv_gem.c
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358
src/intel/vulkan/anv_gem.c
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/*
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* Copyright © 2015 Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*/
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#define _DEFAULT_SOURCE
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#include <sys/ioctl.h>
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#include <sys/mman.h>
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#include <string.h>
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#include <errno.h>
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#include <unistd.h>
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#include <fcntl.h>
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#include "anv_private.h"
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#define VG_CLEAR(s) VG(memset(&s, 0, sizeof(s)))
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static int
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anv_ioctl(int fd, unsigned long request, void *arg)
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{
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int ret;
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do {
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ret = ioctl(fd, request, arg);
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} while (ret == -1 && (errno == EINTR || errno == EAGAIN));
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return ret;
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}
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/**
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* Wrapper around DRM_IOCTL_I915_GEM_CREATE.
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*
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* Return gem handle, or 0 on failure. Gem handles are never 0.
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*/
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uint32_t
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anv_gem_create(struct anv_device *device, size_t size)
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{
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struct drm_i915_gem_create gem_create;
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int ret;
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VG_CLEAR(gem_create);
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gem_create.size = size;
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ret = anv_ioctl(device->fd, DRM_IOCTL_I915_GEM_CREATE, &gem_create);
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if (ret != 0) {
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/* FIXME: What do we do if this fails? */
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return 0;
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}
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return gem_create.handle;
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}
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void
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anv_gem_close(struct anv_device *device, uint32_t gem_handle)
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{
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struct drm_gem_close close;
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VG_CLEAR(close);
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close.handle = gem_handle;
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anv_ioctl(device->fd, DRM_IOCTL_GEM_CLOSE, &close);
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}
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/**
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* Wrapper around DRM_IOCTL_I915_GEM_MMAP.
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*/
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void*
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anv_gem_mmap(struct anv_device *device, uint32_t gem_handle,
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uint64_t offset, uint64_t size, uint32_t flags)
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{
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struct drm_i915_gem_mmap gem_mmap;
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int ret;
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gem_mmap.handle = gem_handle;
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VG_CLEAR(gem_mmap.pad);
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gem_mmap.offset = offset;
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gem_mmap.size = size;
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VG_CLEAR(gem_mmap.addr_ptr);
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gem_mmap.flags = flags;
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ret = anv_ioctl(device->fd, DRM_IOCTL_I915_GEM_MMAP, &gem_mmap);
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if (ret != 0) {
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/* FIXME: Is NULL the right error return? Cf MAP_INVALID */
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return NULL;
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}
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VG(VALGRIND_MALLOCLIKE_BLOCK(gem_mmap.addr_ptr, gem_mmap.size, 0, 1));
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return (void *)(uintptr_t) gem_mmap.addr_ptr;
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}
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/* This is just a wrapper around munmap, but it also notifies valgrind that
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* this map is no longer valid. Pair this with anv_gem_mmap().
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*/
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void
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anv_gem_munmap(void *p, uint64_t size)
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{
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VG(VALGRIND_FREELIKE_BLOCK(p, 0));
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munmap(p, size);
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}
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uint32_t
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anv_gem_userptr(struct anv_device *device, void *mem, size_t size)
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{
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struct drm_i915_gem_userptr userptr;
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int ret;
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VG_CLEAR(userptr);
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userptr.user_ptr = (__u64)((unsigned long) mem);
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userptr.user_size = size;
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userptr.flags = 0;
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ret = anv_ioctl(device->fd, DRM_IOCTL_I915_GEM_USERPTR, &userptr);
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if (ret == -1)
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return 0;
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return userptr.handle;
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}
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int
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anv_gem_set_caching(struct anv_device *device,
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uint32_t gem_handle, uint32_t caching)
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{
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struct drm_i915_gem_caching gem_caching;
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VG_CLEAR(gem_caching);
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gem_caching.handle = gem_handle;
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gem_caching.caching = caching;
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return anv_ioctl(device->fd, DRM_IOCTL_I915_GEM_SET_CACHING, &gem_caching);
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}
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int
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anv_gem_set_domain(struct anv_device *device, uint32_t gem_handle,
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uint32_t read_domains, uint32_t write_domain)
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{
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struct drm_i915_gem_set_domain gem_set_domain;
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VG_CLEAR(gem_set_domain);
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gem_set_domain.handle = gem_handle;
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gem_set_domain.read_domains = read_domains;
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gem_set_domain.write_domain = write_domain;
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return anv_ioctl(device->fd, DRM_IOCTL_I915_GEM_SET_DOMAIN, &gem_set_domain);
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}
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/**
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* On error, \a timeout_ns holds the remaining time.
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*/
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int
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anv_gem_wait(struct anv_device *device, uint32_t gem_handle, int64_t *timeout_ns)
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{
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struct drm_i915_gem_wait wait;
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int ret;
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VG_CLEAR(wait);
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wait.bo_handle = gem_handle;
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wait.timeout_ns = *timeout_ns;
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wait.flags = 0;
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ret = anv_ioctl(device->fd, DRM_IOCTL_I915_GEM_WAIT, &wait);
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*timeout_ns = wait.timeout_ns;
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return ret;
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}
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int
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anv_gem_execbuffer(struct anv_device *device,
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struct drm_i915_gem_execbuffer2 *execbuf)
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{
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return anv_ioctl(device->fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, execbuf);
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}
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int
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anv_gem_set_tiling(struct anv_device *device,
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uint32_t gem_handle, uint32_t stride, uint32_t tiling)
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{
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struct drm_i915_gem_set_tiling set_tiling;
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int ret;
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/* set_tiling overwrites the input on the error path, so we have to open
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* code anv_ioctl.
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*/
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do {
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VG_CLEAR(set_tiling);
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set_tiling.handle = gem_handle;
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set_tiling.tiling_mode = tiling;
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set_tiling.stride = stride;
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ret = ioctl(device->fd, DRM_IOCTL_I915_GEM_SET_TILING, &set_tiling);
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} while (ret == -1 && (errno == EINTR || errno == EAGAIN));
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return ret;
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}
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int
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anv_gem_get_param(int fd, uint32_t param)
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{
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drm_i915_getparam_t gp;
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int ret, tmp;
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VG_CLEAR(gp);
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gp.param = param;
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gp.value = &tmp;
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ret = anv_ioctl(fd, DRM_IOCTL_I915_GETPARAM, &gp);
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if (ret == 0)
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return tmp;
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return 0;
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}
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bool
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anv_gem_get_bit6_swizzle(int fd, uint32_t tiling)
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{
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struct drm_gem_close close;
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int ret;
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struct drm_i915_gem_create gem_create;
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VG_CLEAR(gem_create);
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gem_create.size = 4096;
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if (anv_ioctl(fd, DRM_IOCTL_I915_GEM_CREATE, &gem_create)) {
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assert(!"Failed to create GEM BO");
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return false;
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}
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bool swizzled = false;
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/* set_tiling overwrites the input on the error path, so we have to open
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* code anv_ioctl.
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*/
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struct drm_i915_gem_set_tiling set_tiling;
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do {
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VG_CLEAR(set_tiling);
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set_tiling.handle = gem_create.handle;
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set_tiling.tiling_mode = tiling;
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set_tiling.stride = tiling == I915_TILING_X ? 512 : 128;
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ret = ioctl(fd, DRM_IOCTL_I915_GEM_SET_TILING, &set_tiling);
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} while (ret == -1 && (errno == EINTR || errno == EAGAIN));
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if (ret != 0) {
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assert(!"Failed to set BO tiling");
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goto close_and_return;
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}
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struct drm_i915_gem_get_tiling get_tiling;
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VG_CLEAR(get_tiling);
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get_tiling.handle = gem_create.handle;
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if (anv_ioctl(fd, DRM_IOCTL_I915_GEM_GET_TILING, &get_tiling)) {
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assert(!"Failed to get BO tiling");
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goto close_and_return;
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}
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swizzled = get_tiling.swizzle_mode != I915_BIT_6_SWIZZLE_NONE;
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close_and_return:
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VG_CLEAR(close);
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close.handle = gem_create.handle;
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anv_ioctl(fd, DRM_IOCTL_GEM_CLOSE, &close);
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return swizzled;
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}
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int
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anv_gem_create_context(struct anv_device *device)
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{
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struct drm_i915_gem_context_create create;
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int ret;
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VG_CLEAR(create);
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ret = anv_ioctl(device->fd, DRM_IOCTL_I915_GEM_CONTEXT_CREATE, &create);
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if (ret == -1)
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return -1;
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return create.ctx_id;
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}
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int
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anv_gem_destroy_context(struct anv_device *device, int context)
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{
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struct drm_i915_gem_context_destroy destroy;
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VG_CLEAR(destroy);
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destroy.ctx_id = context;
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return anv_ioctl(device->fd, DRM_IOCTL_I915_GEM_CONTEXT_DESTROY, &destroy);
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}
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int
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anv_gem_get_aperture(int fd, uint64_t *size)
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{
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struct drm_i915_gem_get_aperture aperture;
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int ret;
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VG_CLEAR(aperture);
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ret = anv_ioctl(fd, DRM_IOCTL_I915_GEM_GET_APERTURE, &aperture);
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if (ret == -1)
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return -1;
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*size = aperture.aper_available_size;
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return 0;
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}
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int
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anv_gem_handle_to_fd(struct anv_device *device, uint32_t gem_handle)
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{
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struct drm_prime_handle args;
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int ret;
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VG_CLEAR(args);
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args.handle = gem_handle;
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args.flags = DRM_CLOEXEC;
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ret = anv_ioctl(device->fd, DRM_IOCTL_PRIME_HANDLE_TO_FD, &args);
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if (ret == -1)
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return -1;
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return args.fd;
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}
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uint32_t
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anv_gem_fd_to_handle(struct anv_device *device, int fd)
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{
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struct drm_prime_handle args;
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int ret;
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VG_CLEAR(args);
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args.fd = fd;
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ret = anv_ioctl(device->fd, DRM_IOCTL_PRIME_FD_TO_HANDLE, &args);
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if (ret == -1)
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return 0;
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return args.handle;
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}
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