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intel: Run the optimization loop before and after lowering int64

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For bindless SSBO access, we have to do 64-bit address calculations.  On
ICL and above, we don't have 64-bit integer support so we have to lower
the address calculations to 32-bit arithmetic.  If we don't run the
optimization loop before lowering, we won't fold any of the address
chain calculations before lowering 64-bit arithmetic and they aren't
really foldable afterwards.  This cuts the size of the generated code in
the compute shader in dEQP-VK.ssbo.phys.layout.random.16bit.scalar.13 by
around 30%.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
This commit is contained in:
Jason Ekstrand
2019-07-12 18:47:15 -05:00
parent 7103baf01f
commit 974fabe810
1 changed files with 3 additions and 1 deletions
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4
src/intel/compiler/brw_nir.c
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@@ -821,7 +821,6 @@ brw_postprocess_nir(nir_shader *nir, const struct brw_compiler *compiler,
UNUSED bool progress; /* Written by OPT */ UNUSED bool progress; /* Written by OPT */
OPT(brw_nir_lower_mem_access_bit_sizes); OPT(brw_nir_lower_mem_access_bit_sizes);
OPT(nir_lower_int64, nir->options->lower_int64_options);
do { do {
progress = false; progress = false;
@@ -830,6 +829,9 @@ brw_postprocess_nir(nir_shader *nir, const struct brw_compiler *compiler,
brw_nir_optimize(nir, compiler, is_scalar, false); brw_nir_optimize(nir, compiler, is_scalar, false);
if (OPT(nir_lower_int64, nir->options->lower_int64_options))
brw_nir_optimize(nir, compiler, is_scalar, false);
if (devinfo->gen >= 6) { if (devinfo->gen >= 6) {
/* Try and fuse multiply-adds */ /* Try and fuse multiply-adds */
OPT(brw_nir_opt_peephole_ffma); OPT(brw_nir_opt_peephole_ffma);